Semiconductor & Computer Engineering
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Information for "renesas/r-car/h3"
Basic information
| Display title | R-Car H3 - Renesas |
| Default sort key | R-Car H3, Intel |
| Page length (in bytes) | 4,292 |
| Page ID | 21374 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 6 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | BCD (talk | contribs) |
| Date of page creation | 01:38, 23 July 2017 |
| Latest editor | David (talk | contribs) |
| Date of latest edit | 14:43, 29 December 2018 |
| Total number of edits | 17 |
| Total number of distinct authors | 3 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (17) | Templates used on this page:
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Facts about "R-Car H3 - Renesas"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | R-Car H3 - Renesas#package + |
| core count | 9 + |
| core name | Cortex-A53 +, Cortex-A57 + and Cortex-R7 + |
| core voltage | 0.8 V (8 dV, 80 cV, 800 mV) + |
| designer | Renesas + and ARM Holdings + |
| die area | 111.36 mm² (0.173 in², 1.114 cm², 111,360,000 µm²) + |
| die length | 12.94 mm (1.294 cm, 0.509 in, 12,940 µm) + |
| die width | 8.61 mm (0.861 cm, 0.339 in, 8,610 µm) + |
| family | R-Car + |
| first announced | December 2, 2015 + |
| first launched | March 2018 + |
| full page name | renesas/r-car/h3 + |
| has ecc memory support | false + |
| instance of | microprocessor + |
| integrated gpu | PowerVR GX6650 + |
| integrated gpu designer | Imagination Technologies + |
| io voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
| isa | ARMv8 + |
| isa family | ARM + |
| l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + and 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
| ldate | March 2018 + |
| main image |  + |
| manufacturer | TSMC + |
| market segment | Embedded + |
| max cpu count | 1 + |
| max memory bandwidth | 47.68 GiB/s (48,824.32 MiB/s, 51.196 GB/s, 51,196.01 MB/s, 0.0466 TiB/s, 0.0512 TB/s) + |
| max memory channels | 4 + |
| microarchitecture | Cortex-A53 +, Cortex-A57 + and Cortex-R7 + |
| model number | H3 + |
| name | R-Car H3 + |
| package | FCBGA-1384 + |
| part number | R8A77950 + |
| process | 16 nm (0.016 μm, 1.6e-5 mm) + |
| series | 3rd Gen + |
| smp max ways | 1 + |
| supported memory type | LPDDR4-3200 + |
| technology | CMOS + |
| thread count | 9 + |
| word size | 64 bit (8 octets, 16 nibbles) + |
