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Information for "pezy/pezy-1"

Basic information

Display titlePEZY-1 - PEZY
Default sort keypezy/pezy-1
Page length (in bytes)2,457
Page ID10315
Page content languageEnglish (en)
Page content modelwikitext
Indexing by robotsAllowed
Number of redirects to this page2
Counted as a content pageYes
Number of subpages of this page0 (0 redirects; 0 non-redirects)

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Edit history

Page creatorChipIt (talk | contribs)
Date of page creation13:30, 6 September 2016
Latest editor207.55.13.59 (talk)
Date of latest edit03:48, 20 October 2018
Total number of edits21
Total number of distinct authors5
Recent number of edits (within past 90 days)0
Recent number of distinct authors0

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Retrieved from "https://en.wikichip.org/wiki/pezy/pezy-1"
Facts about "PEZY-1 - PEZY"
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PEZY-1 - PEZY#io +
base frequency533.33 MHz (0.533 GHz, 533,330 kHz) +
core count512 +
designerPEZY +
die area335 mm² (0.519 in², 3.35 cm², 335,000,000 µm²) +
die length16.8 mm (1.68 cm, 0.661 in, 16,800 µm) +
die width21 mm (2.1 cm, 0.827 in, 21,000 µm) +
first announced2011 +
first launched2012 +
full page namepezy/pezy-1 +
has ecc memory supporttrue +
instance ofmicroprocessor +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldate2012 +
main imageFile:pezy 1.jpg +
manufacturerTSMC +
market segmentIndustrial +
max memory bandwidth39.74 GiB/s (40,693.76 MiB/s, 42.671 GB/s, 42,670.5 MB/s, 0.0388 TiB/s, 0.0427 TB/s) +
max memory channels4 +
max pcie lanes24 +
model numberPEZY-1 +
namePEZY-1 +
power dissipation35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
process40 nm (0.04 μm, 4.0e-5 mm) +
supported memory typeDDR3-1333 +
technologyCMOS +