Semiconductor & Computer Engineering
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Information for "intrinsity/fastmath/fastmath-lp"
Basic information
| Display title | FastMATH-LP - Intrinsity |
| Default sort key | FastMATH, LP |
| Page length (in bytes) | 3,340 |
| Page ID | 9762 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 2 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | At32Hz (talk | contribs) |
| Date of page creation | 15:25, 3 July 2016 |
| Latest editor | ChippyBot (talk | contribs) |
| Date of latest edit | 15:31, 13 December 2017 |
| Total number of edits | 14 |
| Total number of distinct authors | 3 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (8) | Templates used on this page:
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Facts about "FastMATH-LP - Intrinsity"
| base frequency | 1,000 MHz (1 GHz, 1,000,000 kHz) + |
| bus rate | 4,000 MT/s (4 GT/s, 4,000,000 kT/s) + |
| bus speed | 500 MHz (0.5 GHz, 500,000 kHz) + |
| bus type | RapidIO + |
| core count | 1 + |
| core voltage | 0.85 V (8.5 dV, 85 cV, 850 mV) + |
| designer | Intrinsity + |
| family | FastMATH + |
| first announced | 2002 + |
| first launched | 2003 + |
| full page name | intrinsity/fastmath/fastmath-lp + |
| has feature | JTAG + |
| instance of | microprocessor + |
| l1d$ description | 256 blocks × 16 words/block + |
| l1d$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
| l1i$ description | 256 blocks × 16 words/block + |
| l1i$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
| ldate | 2003 + |
| main image |  + |
| manufacturer | TSMC + |
| market segment | Embedded + |
| max memory | 1,024 MiB (1,048,576 KiB, 1,073,741,824 B, 1 GiB, 9.765625e-4 TiB) + |
| microarchitecture | FashMATH + |
| model number | FastMATH-LP + |
| name | FastMATH-LP + |
| power dissipation | 6 W (6,000 mW, 0.00805 hp, 0.006 kW) + |
| process | 130 nm (0.13 μm, 1.3e-4 mm) + |
| technology | Dynamic CMOS + |
| thread count | 1 + |
| word size | 32 bit (4 octets, 8 nibbles) + |
