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Display titleXeon D-1632 - Intel
Default sort keyXeon D-1632, Intel
Page length (in bytes)3,567
Page ID33106
Page content languageEnglish (en)
Page content modelwikitext
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Number of redirects to this page7
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Page creatorDavid (talk | contribs)
Date of page creation06:01, 6 April 2019
Latest editorDavid (talk | contribs)
Date of latest edit06:42, 6 April 2019
Total number of edits3
Total number of distinct authors1
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Retrieved from "https://en.wikichip.org/wiki/intel/xeon_d/d-1632"
Facts about "Xeon D-1632 - Intel"
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Xeon D-1632 - Intel#pcie +
back imageFile:broadwell de (back).png +
base frequency1,500 MHz (1.5 GHz, 1,500,000 kHz) +
bus typeDMI 2.0 +
clock multiplier15 +
core count8 +
core family6 +
core model6 +
core nameHewitt Lake +
designerIntel +
die area246.24 mm² (0.382 in², 2.462 cm², 246,240,000 µm²) +
familyXeon D +
first announcedApril 2, 2019 +
first launchedApril 2, 2019 +
full page nameintel/xeon d/d-1632 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Secure Key Technology +, OS Guard + and Integrated QuickAssist Technology +
has integrated intel quickassist technologytrue +
has intel enhanced speedstep technologytrue +
has intel secure key technologytrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size512 KiB (524,288 B, 0.5 MiB) +
l1d$ description8-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description8-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description8-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ description16-way set associative +
l3$ size12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) +
ldateApril 2, 2019 +
main imageFile:hewitt lake (front).png +
manufacturerIntel +
market segmentServer + and Embedded +
max case temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max cpu count1 +
max junction temperature378.15 K (105 °C, 221 °F, 680.67 °R) +
max memory131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth31.78 GiB/s (32,542.72 MiB/s, 34.124 GB/s, 34,123.515 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max sata ports6 +
max usb ports4 +
microarchitectureBroadwell +
model numberD-1632 +
nameXeon D-1632 +
packageFCBGA-1667 +
platformGrangeville +
process14 nm (0.014 μm, 1.4e-5 mm) +
seriesD-1600 +
smp max ways1 +
supported memory typeDDR4-2133 +
tdp30 W (30,000 mW, 0.0402 hp, 0.03 kW) +
technologyCMOS +
thread count16 +
transistor count3,200,000,000 +
turbo frequency (1 core)2,500 MHz (2.5 GHz, 2,500,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +