Information for "intel/cores/silverthorne"

Basic information

Display title	Silverthorne - Cores - Intel
Default sort key	Silverthorne, Intel
Page length (in bytes)	4,092
Page ID	17172
Page content language	English (en)
Page content model	wikitext
Indexing by robots	Allowed
Number of redirects to this page	5
Counted as a content page	Yes
Number of subpages of this page	0 (0 redirects; 0 non-redirects)

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Page creator	David (talk \| contribs)
Date of page creation	18:00, 27 March 2017
Latest editor	David (talk \| contribs)
Date of latest edit	04:54, 15 April 2017
Total number of edits	18
Total number of distinct authors	2
Recent number of edits (within past 90 days)	0
Recent number of distinct authors	0

Transcluded templates (22)	Templates used on this page: Template:\\ (edit) Template:amd (edit) Template:arch (view source) (protected) Template:clear (edit) Template:comp table count (edit) Template:comp table end (edit) Template:comp table header 1 (edit) Template:comp table start (edit) Template:core (edit) Template:intel (view source) (protected) Template:intel bonnell core see also (edit) Template:intel title (view source) (protected) Template:istrue (view source) (protected) Template:link-amd (edit) Template:link-intel (view source) (protected) Template:link-x86 (view source) (protected) Template:proc table 3 (view source) (protected) Template:see also (edit) Template:url parse anchor (view source) (protected) Template:url parse article (view source) (protected) Template:x86 (view source) (protected) Module:core (view source)

designer	Intel +
first announced	April 18, 2007 +
first launched	April 2, 2008 +
instance of	core +
isa	x86-32 +
main image	+ and +
main image caption	Packaged in FCBGA-441 (13x14) + and Packaged in FCBGA-437 (22x22) +
manufacturer	Intel +
microarchitecture	Bonnell +
name	Silverthorne +
process	45 nm (0.045 μm, 4.5e-5 mm) +
technology	CMOS +
word size	32 bit (4 octets, 8 nibbles) +