From WikiChip
Information for "intel/cores/sandy bridge e"
Basic information
Display title | Sandy Bridge E - Cores - Intel |
Default sort key | Sandy Bridge E, Intel |
Page length (in bytes) | 502 |
Page ID | 21430 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 0 |
Counted as a content page | Yes |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | David (talk | contribs) |
Date of page creation | 21:42, 24 July 2017 |
Latest editor | David (talk | contribs) |
Date of latest edit | 22:01, 24 July 2017 |
Total number of edits | 2 |
Total number of distinct authors | 1 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Page properties
Transcluded templates (3) | Templates used on this page:
|
Facts about "Sandy Bridge E - Cores - Intel"
designer | Intel + |
first announced | November 14, 2011 + |
first launched | November 14, 2011 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
main image | ![]() ![]() |
main image caption | Package front + and Package back + |
manufacturer | Intel + |
microarchitecture | Sandy Bridge + |
name | Sandy Bridge E + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |