Semiconductor & Computer Engineering
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Information for "intel/cores/denverton"
Basic information
| Display title | Denverton - Cores - Intel |
| Default sort key | Denverton, Intel |
| Page length (in bytes) | 6,858 |
| Page ID | 21629 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 4 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | Inject (talk | contribs) |
| Date of page creation | 16:31, 15 August 2017 |
| Latest editor | 141.70.45.7 (talk) |
| Date of latest edit | 05:47, 25 April 2020 |
| Total number of edits | 27 |
| Total number of distinct authors | 5 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (18) | Templates used on this page:
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Facts about "Denverton - Cores - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Denverton - Cores - Intel#package + |
| designer | Intel + |
| first announced | June 1, 2016 + |
| first launched | February 22, 2017 + |
| instance of | core + |
| isa | x86-64 + |
| isa family | x86 + |
| main image | .png) + |
| main image caption | FCBGA-1310 Front + |
| manufacturer | Intel + |
| microarchitecture | Goldmont + |
| name | Denverton + |
| package | FCBGA-1310 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |
.png){kind=link}