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Information for "intel/cores/coffee lake er"
Basic information
Display title | Coffee Lake ER - Cores - Intel |
Default sort key | Coffee Lake ER, Intel |
Page length (in bytes) | 5,382 |
Page ID | 34414 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 1 |
Counted as a content page | Yes |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | David (talk | contribs) |
Date of page creation | 09:24, 9 May 2019 |
Latest editor | GreenReaper (talk | contribs) |
Date of latest edit | 11:41, 12 June 2023 |
Total number of edits | 6 |
Total number of distinct authors | 2 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Page properties
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Facts about "Coffee Lake ER - Cores - Intel"
chipset | Cannon Point + |
designer | Intel + |
first announced | 2019 + |
first launched | 2019 + |
instance of | core + |
isa | x86-64 + |
main image | + |
manufacturer | Intel + |
microarchitecture | Coffee Lake + |
name | Coffee Lake ER + |
package | FCLGA-1151 + and FCLGA14C + |
platform | Mehlow + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | Socket H4 + and LGA-1151 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |