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Information for "hisilicon/kirin"
Basic information
Display title | Kirin - HiSilicon |
Default sort key | Kirin, HiSilicon |
Page length (in bytes) | 4,286 |
Page ID | 25497 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 7 |
Counted as a content page | Yes |
Number of subpages of this page | 4 (0 redirects; 4 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | Inject (talk | contribs) |
Date of page creation | 14:54, 6 September 2017 |
Latest editor | 95.24.54.42 (talk) |
Date of latest edit | 14:57, 26 March 2025 |
Total number of edits | 41 |
Total number of distinct authors | 15 |
Recent number of edits (within past 90 days) | 4 |
Recent number of distinct authors | 2 |
Page properties
Transcluded templates (16) | Templates used on this page:
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Facts about "Kirin - HiSilicon"
designer | HiSilicon + and ARM Holdings + |
first announced | 2013 + |
first launched | 2014 + |
full page name | hisilicon/kirin + |
instance of | system on a chip family + |
instruction set architecture | ARM + |
main designer | HiSilicon + |
manufacturer | TSMC + |
microarchitecture | Cortex-A9 +, Cortex-A53 +, Cortex-A72 +, Cortex-A73 +, Cortex-A15 +, Cortex-A76 +, Cortex-A77 +, Cortex-A7 + and Cortex-A55 + |
name | Kirin + |
process | 28 nm (0.028 μm, 2.8e-5 mm) +, 16 nm (0.016 μm, 1.6e-5 mm) +, 10 nm (0.01 μm, 1.0e-5 mm) +, 7 nm (0.007 μm, 7.0e-6 mm) +, 5 nm (0.005 μm, 5.0e-6 mm) +, 14 nm (0.014 μm, 1.4e-5 mm) + and 12 nm (0.012 μm, 1.2e-5 mm) + |
technology | CMOS + |
word size | 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) + |