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Information for "cavium/octeon plus"
Basic information
Display title | OCTEON Plus - Cavium |
Default sort key | OCTEON Plus, Cavium |
Page length (in bytes) | 6,178 |
Page ID | 12189 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 4 |
Counted as a content page | Yes |
Number of subpages of this page | 80 (0 redirects; 80 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | ChipIt (talk | contribs) |
Date of page creation | 02:26, 11 December 2016 |
Latest editor | ChipIt (talk | contribs) |
Date of latest edit | 14:41, 29 December 2016 |
Total number of edits | 15 |
Total number of distinct authors | 1 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Page properties
Transcluded templates (15) | Templates used on this page:
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Facts about "OCTEON Plus - Cavium"
designer | Cavium + |
first announced | October 9, 2006 + |
first launched | February 2007 + |
full page name | cavium/octeon plus + |
instance of | system on a chip family + |
instruction set architecture | MIPS64 + |
main designer | Cavium + |
manufacturer | TSMC + |
microarchitecture | cnMIPS + |
name | Cavium OCTEON Plus + |
package | FCBGA-1521 + |
process | 90 nm (0.09 μm, 9.0e-5 mm) + |
socket | BGA-1521 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |