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From WikiChip
Information for "cavium/microarchitectures/thunderx1"
Basic information
| Display title | ThunderX1 - Microarchitectures - Cavium |
| Default sort key | ThunderX1, Cavium |
| Page length (in bytes) | 969 |
| Page ID | 32045 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | 50.233.219.101 (talk) |
| Date of page creation | 19:35, 3 December 2018 |
| Latest editor | 173.76.100.32 (talk) |
| Date of latest edit | 18:30, 1 February 2019 |
| Total number of edits | 5 |
| Total number of distinct authors | 4 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (3) | Templates used on this page: |
Retrieved from "https://en.wikichip.org/wiki/cavium/microarchitectures/thunderx1"
Facts about "ThunderX1 - Microarchitectures - Cavium"
| codename | ThunderX1 + |
| core count | 24 + and 48 + |
| designer | Cavium + |
| first launched | 2014 + |
| full page name | cavium/microarchitectures/thunderx1 + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8.1 + |
| manufacturer | GlobalFoundries + |
| microarchitecture type | CPU + |
| name | ThunderX1 + |
| process | 28 nm (0.028 μm, 2.8e-5 mm) + |