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Information for "amd/microarchitectures/k5"
Basic information
| Display title | K5 - Microarchitectures - AMD |
| Default sort key | K5, AMD |
| Page length (in bytes) | 2,168 |
| Page ID | 10219 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 2 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | At32Hz (talk | contribs) |
| Date of page creation | 11:49, 5 September 2016 |
| Latest editor | Mys 721tx (talk | contribs) |
| Date of latest edit | 19:01, 30 November 2017 |
| Total number of edits | 9 |
| Total number of distinct authors | 3 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (14) | Templates used on this page:
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Facts about "K5 - Microarchitectures - AMD"
| codename | K5 + |
| designer | AMD + |
| first launched | March 27, 1996 + |
| full page name | amd/microarchitectures/k5 + |
| instance of | microarchitecture + |
| instruction set architecture | x86-32 + |
| manufacturer | AMD + |
| microarchitecture type | CPU + |
| name | K5 + |
| phase-out | 1998 + |
| process | 500 nm (0.5 μm, 5.0e-4 mm) + and 350 nm (0.35 μm, 3.5e-4 mm) + |