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Information for "amd/cores/cezanne"
Basic information
| Display title | Cezanne - Cores - AMD |
| Default sort key | Cezanne, AMD |
| Page length (in bytes) | 10,380 |
| Page ID | 36472 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | QuietRub (talk | contribs) |
| Date of page creation | 23:24, 30 May 2021 |
| Latest editor | 95.24.55.167 (talk) |
| Date of latest edit | 08:31, 6 November 2025 |
| Total number of edits | 9 |
| Total number of distinct authors | 6 |
| Recent number of edits (within past 90 days) | 1 |
| Recent number of distinct authors | 1 |
Page properties
| Transcluded templates (22) | Templates used on this page:
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Facts about "Cezanne - Cores - AMD"
| designer | AMD + |
| first announced | January 12, 2021 + |
| instance of | core + |
| isa | x86-64 + |
| isa family | x86 + |
| manufacturer | TSMC + |
| microarchitecture | Zen 3 + |
| name | Cezanne + |
| package | OPGA-1331 + and BGA-1140 + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + |
| socket | Socket AM4 + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |