Revision history of "qualcomm/microarchitectures/hexagon"

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(cur | prev) 21:45, 26 February 2025‎ 95.24.57.85 (talk)‎ . . (8,518 bytes) (+1,154)‎ . . (→‎Versions) (undo)
(cur | prev) 19:01, 26 February 2025‎ 95.24.57.85 (talk)‎ . . (7,364 bytes) (+4,290)‎ . . (add tables) (undo)
(cur | prev) 21:32, 27 January 2019‎ A5b (talk | contribs)‎ . . (3,074 bytes) (+14)‎ . . (| type = 4-way VLIW, 4-thread SMT (barell multithreading?)) (undo)
(cur | prev) 21:30, 27 January 2019‎ A5b (talk | contribs)‎ m . . (3,060 bytes) (+9)‎ . . (typo) (undo)
(cur | prev) 22:10, 20 March 2018‎ A5b (talk | contribs)‎ m . . (3,051 bytes) (+204)‎ . . (https://developer.qualcomm.com/software/hexagon-dsp-sdk/dsp-processor; manuf from http://www.techinsights.com/reports-and-subscriptions/open-market-reports/Report-Profile/?ReportKey=SAR-1201-801-02) (undo)
(cur | prev) 22:05, 20 March 2018‎ A5b (talk | contribs)‎ . . (2,847 bytes) (+2,847)‎ . . (Some intro materials about Qualcomm Hexagon DSP VLIW architecture)

codename	Hexagon +
designer	Qualcomm +
full page name	qualcomm/microarchitectures/hexagon +
instance of	microarchitecture +
manufacturer	TSMC +
name	Hexagon +
process	65 nm (0.065 μm, 6.5e-5 mm) +, 45 nm (0.045 μm, 4.5e-5 mm) +, 28 nm (0.028 μm, 2.8e-5 mm) +, 14 nm (0.014 μm, 1.4e-5 mm) + and 10 nm (0.01 μm, 1.0e-5 mm) +

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