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Revision history of "cavium/octeon plus/cn5830-800bg1521-scp"
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Facts about "CN5830-800 SCP - Cavium"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | CN5830-800 SCP - Cavium#package + |
base frequency | 800 MHz (0.8 GHz, 800,000 kHz) + |
core count | 4 + |
designer | Cavium + |
family | OCTEON Plus + |
first announced | October 9, 2006 + |
first launched | February 2007 + |
full page name | cavium/octeon plus/cn5830-800bg1521-scp + |
has ecc memory support | true + |
has hardware accelerators for cryptography | true + |
has hardware accelerators for network quality of service processing | true + |
has hardware accelerators for tcp packet processing | true + |
instance of | microprocessor + |
isa | MIPS64 + |
isa family | MIPS + |
l1$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l1d$ description | 64-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 64-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
ldate | February 2007 + |
main image | ![]() |
manufacturer | TSMC + |
market segment | Network + |
max cpu count | 1 + |
max memory bandwidth | 11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) + |
max memory channels | 1 + |
microarchitecture | cnMIPS + |
model number | CN5830-800 SCP + |
name | Cavium CN5830-800 SCP + |
package | FCBGA-1521 + |
part number | CN5830-800BG1521-SCP + |
process | 130 nm (0.13 μm, 1.3e-4 mm) + |
series | CN58xx + |
smp max ways | 1 + |
supported memory type | DDR2-800 + |
technology | CMOS + |
thread count | 4 + |
word size | 64 bit (8 octets, 16 nibbles) + |