Revision history of "cavium/octeon/cn3110-550bg868-scp"

Diff selection: Mark the radio boxes of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.

(cur | prev) 15:11, 13 December 2017‎ ChippyBot (talk | contribs)‎ m . . (4,042 bytes) (+1)‎ . . (Bot: moving all {{mpu}} to {{chip}}) (undo)
(cur | prev) 16:53, 30 June 2017‎ ChippyBot (talk | contribs)‎ m . . (4,041 bytes) (0)‎ . . (Bot: corrected param) (undo)
(cur | prev) 21:23, 23 June 2017‎ ChippyBot (talk | contribs)‎ m . . (4,041 bytes) (-27)‎ . . (Bot: Automated text replacement (-\| electrical += Yes +)) (undo)
(cur | prev) 21:06, 22 June 2017‎ ChippyBot (talk | contribs)‎ m . . (4,068 bytes) (-232)‎ . . (Bot: change package to new layout) (undo)
(cur | prev) 01:02, 11 December 2016‎ ChipIt (talk | contribs)‎ . . (4,300 bytes) (-4)‎ . . (undo)
(cur | prev) 00:59, 11 December 2016‎ ChipIt (talk | contribs)‎ . . (4,304 bytes) (+4)‎ . . (undo)
(cur | prev) 16:11, 10 December 2016‎ ChipIt (talk | contribs)‎ . . (4,300 bytes) (-21)‎ . . (→‎Features) (undo)
(cur | prev) 17:25, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (4,321 bytes) (+14)‎ . . (undo)
(cur | prev) 14:59, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (4,307 bytes) (+8)‎ . . (undo)
(cur | prev) 14:54, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (4,299 bytes) (-1)‎ . . (undo)
(cur | prev) 14:49, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (4,300 bytes) (+364)‎ . . (undo)
(cur | prev) 14:23, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (3,936 bytes) (+747)‎ . . (undo)
(cur | prev) 12:43, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (3,189 bytes) (0)‎ . . (→‎Cache) (undo)
(cur | prev) 03:38, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (3,189 bytes) (+358)‎ . . (undo)
(cur | prev) 02:21, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (2,831 bytes) (+491)‎ . . (undo)
(cur | prev) 22:53, 8 December 2016‎ ChipIt (talk | contribs)‎ . . (2,340 bytes) (+2,340)‎ . . (Created page with "{{cavium title|CN3110-550 SCP}} {{mpu | name = Cavium CN3110-550 SCP | no image = | image = octeon cn31xx.png | image size =...")

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	CN3110-550 SCP - Cavium#package +
base frequency	550 MHz (0.55 GHz, 550,000 kHz) +
core count	1 +
core name	cnMIPS +
designer	Cavium +
family	OCTEON +
first announced	January 30, 2006 +
first launched	May 1, 2006 +
full page name	cavium/octeon/cn3110-550bg868-scp +
has ecc memory support	true +
has hardware accelerators for cryptography	true +
has hardware accelerators for network quality of service processing	true +
has hardware accelerators for tcp packet processing	true +
instance of	microprocessor +
isa	MIPS64 +
isa family	MIPS +
l1$ size	40 KiB (40,960 B, 0.0391 MiB) +
l1d$ description	64-way set associative +
l1d$ size	8 KiB (8,192 B, 0.00781 MiB) +
l1i$ description	4-way set associative +
l1i$ size	32 KiB (32,768 B, 0.0313 MiB) +
l2$ description	8-way set associative +
l2$ size	0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldate	May 1, 2006 +
main image	+
manufacturer	TSMC +
market segment	Embedded +
max cpu count	1 +
max memory	4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max memory bandwidth	1.24 GiB/s (1,269.76 MiB/s, 1.331 GB/s, 1,331.44 MB/s, 0.00121 TiB/s, 0.00133 TB/s) + and 4.97 GiB/s (5,089.28 MiB/s, 5.336 GB/s, 5,336.497 MB/s, 0.00485 TiB/s, 0.00534 TB/s) +
max memory channels	1 +
microarchitecture	cnMIPS +
model number	CN3110-550 SCP +
name	Cavium CN3110-550 SCP +
package	HSBGA-868 +
part number	CN3110-550BG868-SCP +
power dissipation	7 W (7,000 mW, 0.00939 hp, 0.007 kW) +
process	130 nm (0.13 μm, 1.3e-4 mm) +
series	CN3100 +
smp max ways	1 +
supported memory type	DDR2-667 +
technology	CMOS +
thread count	1 +
word size	64 bit (8 octets, 16 nibbles) +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung