-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Revision history of "ambric/am2000/am2029"
Diff selection: Mark the radio boxes of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.
Retrieved from "https://en.wikichip.org/wiki/ambric/am2000/am2029"
Facts about "Am2029 - Ambric"
base frequency | 350 MHz (0.35 GHz, 350,000 kHz) + |
bus speed | 100 MHz (0.1 GHz, 100,000 kHz) + |
clock multiplier | 3.5 + |
core count | 216 + |
designer | Ambric + |
family | Am2000 + |
first announced | November 15, 2007 + |
first launched | November 15, 2007 + |
full page name | ambric/am2000/am2029 + |
has feature | PCIe +, JTAG +, GPIO + and serial flash + |
has locked clock multiplier | false + |
instance of | microprocessor + |
last order | 2012 + |
last shipment | 2012 + |
ldate | November 15, 2007 + |
market segment | Embedded + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
microarchitecture | Ambric + |
model number | Am2029 + |
name | Am2029 + |
part number | Am2029 + |
process | 130 nm (0.13 μm, 1.3e-4 mm) + |
series | Gen 2 + |
technology | CMOS + |
word size | 32 bit (4 octets, 8 nibbles) + |