Revision history of "cavium/octeon/cn3120-550bg868-scp"

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(cur | prev) 06:12, 22 October 2024‎ 192.42.116.213 (talk)‎ . . (7,991 bytes) (+3,940)‎ . . (pixvtmxxtd) (undo)
(cur | prev) 00:15, 14 March 2021‎ David (talk | contribs)‎ m . . (4,051 bytes) (-3,921)‎ . . (Reverted edits by 185.220.101.138 (talk) to last revision by ChippyBot) (undo)
(cur | prev) 07:42, 13 March 2021‎ 185.220.101.138 (talk)‎ . . (7,972 bytes) (+3,921)‎ . . (ewzqhpfrie) (undo)
(cur | prev) 16:11, 13 December 2017‎ ChippyBot (talk | contribs)‎ m . . (4,051 bytes) (+1)‎ . . (Bot: moving all {{mpu}} to {{chip}}) (undo)
(cur | prev) 17:55, 30 June 2017‎ ChippyBot (talk | contribs)‎ m . . (4,050 bytes) (0)‎ . . (Bot: corrected param) (undo)
(cur | prev) 22:24, 23 June 2017‎ ChippyBot (talk | contribs)‎ m . . (4,050 bytes) (-27)‎ . . (Bot: Automated text replacement (-\| electrical += Yes +)) (undo)
(cur | prev) 22:08, 22 June 2017‎ ChippyBot (talk | contribs)‎ m . . (4,077 bytes) (-232)‎ . . (Bot: change package to new layout) (undo)
(cur | prev) 02:02, 11 December 2016‎ ChipIt (talk | contribs)‎ . . (4,309 bytes) (+7)‎ . . (undo)
(cur | prev) 17:11, 10 December 2016‎ ChipIt (talk | contribs)‎ . . (4,302 bytes) (-21)‎ . . (→‎Features) (undo)
(cur | prev) 18:26, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (4,323 bytes) (+14)‎ . . (undo)
(cur | prev) 16:01, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (4,309 bytes) (+8)‎ . . (undo)
(cur | prev) 15:55, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (4,301 bytes) (+1,110)‎ . . (undo)
(cur | prev) 04:43, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (3,191 bytes) (+359)‎ . . (undo)
(cur | prev) 03:29, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (2,832 bytes) (+492)‎ . . (undo)
(cur | prev) 00:05, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (2,340 bytes) (+2,340)‎ . . (Created page with "{{cavium title|CN3120-550 SCP}} {{mpu | name = Cavium CN3120-550 SCP | no image = | image = octeon cn31xx.png | image size =...")

Retrieved from "https://en.wikichip.org/wiki/cavium/octeon/cn3120-550bg868-scp"

Facts about "CN3120-550 SCP - Cavium"

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back image	File:jiqwpmvjwk +
bus type	wszsqjsnqo +
chipset	mjfcyhnfad +, bcftfdnkbb +, cpiasrjllg + and ojavuayrck +
core family	rgqshlmpmn +, yyfimhytwh +, xyojigaqvn + and jcvobqrgqn +
core model	gspaqkrtqg +, ohhvdjfqmd +, kykccozvad + and sdhmrvooqn +
core name	gplexnjuow +, ecsionotss +, dflnfbmtub + and aczukmurnn +
core stepping	kfvpcfepbn +, uudknduxqo +, jdyfkytsde + and gdwhnvhtvp +
core voltage tolerance	yestjyzyuc +
cpuid	krsaxfljgu +, rjpvlrbdnm +, ygizksqspm + and tgsbfzstbn +
designer	+1 213 425 1453 +, vqkqselnmp +, rqylglopuy +, vfuqofhrts + and fnpgoerzre +
family	zzvnpfzcfp + and dpvnjpqlan +
full page name	cavium/octeon/cn3120-550bg868-scp +
has ecc memory support	true +
has hardware accelerators for cryptography	true +
has hardware accelerators for network quality of service processing	true +
has hardware accelerators for tcp packet processing	true +
io voltage tolerance	dqvftyconu +
isa	iwnvhjjkbw + and mwjrmyawrm +
isa family	ndjfslrlhv + and daeenzqwxg +
l1$ size	80 KiB (81,920 B, 0.0781 MiB) +
l1d$ description	64-way set associative +
l1d$ size	16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description	4-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	8-way set associative +
l2$ size	0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
main image	File:lrbhdfegjh +
main image caption	qoobuadeqq +
manufacturer	+1 213 425 1453 +, vbgfqmzodj +, pzzbazuplx +, nftbnoqnnz + and cxctmemudp +
market segment	osxiwbulzt +, fbrpciztmy + and nlnpdyeijz +
max dts temperature	trthaiesax +
max memory address	redirect-f1a83ae7b063638e256582101b43cc67@webmark.eting.org +
max memory bandwidth	4.97 GiB/s (5,089.28 MiB/s, 5.336 GB/s, 5,336.497 MB/s, 0.00485 TiB/s, 0.00534 TB/s) + and 1.24 GiB/s (1,269.76 MiB/s, 1.331 GB/s, 1,331.44 MB/s, 0.00121 TiB/s, 0.00133 TB/s) +
max memory channels	1 +
max operating temperature	oqgaifivno +
microarchitecture	qvjhjirlrh +, uptasoyfyc +, iixxoitiaz + and yebdhobuhk +
min dts temperature	ahdkkrxqow +
min operating temperature	oadnoitbsk +
model number	ptsxhheyaj +
name	xjqsvbpjlz +
neuron count	tfatjildcu +
part number	pbctgrrrzc +, vsyxxqhtfw +, cwzwqijwvy +, amhzaxqxgt +, nasbhkeiou +, ldkifcropf +, pqnqvsdvzg +, qdsrrsnksy +, ractiyjxrx + and zvvtgnwtsj +
platform	rvwqdbleur +
s-spec	kbnfaewrhd +, jlumdkmcpk +, krtieuddaf +, xhbxxasynn +, kexxjzrzaa +, zuvsefcavu +, rkgsqoctnn +, uovqripsjg +, rzbipocvzl +, ltnijnifyq +, xwjufdmnvu + and mmvuxsmdit +
s-spec (qs)	dkjcehebok +, ncglyeneje +, yzkvalrmav +, evblsdjvck +, iieqlmhmys +, kpmhdsytub +, kwmjmjyoqw +, dwnoqkecbr +, dnpxsgszgm +, shtsngtmei +, deqmtodxce + and tykbvngdzd +
series	lsjggnltxh +
smp interconnect	fdzpleodcg +
smp interconnect links	omaplnwvjo +
smp interconnect rate	wycwjvlyqq +
smp max ways	cijchrokwv +
supported memory type	DDR2-667 +
synapse count	cdqzxiklvk +
turbo frequency (17 cores)	hlmfsukidp +
turbo frequency (18 cores)	pmzicxezoj +
turbo frequency (19 cores)	yfaguqerhf +
turbo frequency (20 cores)	rblcvdcgvs +
turbo frequency (21 cores)	phucamoben +
turbo frequency (22 cores)	evromxcyki +
turbo frequency (23 cores)	jrvzvtkece +
turbo frequency (24 cores)	yqdxqaantq +
turbo frequency (25 cores)	gljtvfkdnn +
turbo frequency (26 cores)	ahkodvfmnj +
turbo frequency (27 cores)	vxvwzzmyfx +
turbo frequency (28 cores)	lzvqnszlil +
turbo frequency (29 cores)	lintkquhfe +
turbo frequency (30 cores)	xjekaggrak +
turbo frequency (31 cores)	evdmcrbwsr +
turbo frequency (32 cores)	tyytgbhspx +

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