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Latest revision Your text
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{{microarchitecture
 
{{microarchitecture
 
|atype=CPU
 
|atype=CPU
|name=ZhangJiang
+
|name=WuDaoKou
 
|designer=Zhaoxin
 
|designer=Zhaoxin
 
|manufacturer=TSMC
 
|manufacturer=TSMC
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|renaming=Yes
 
|renaming=Yes
 
|isa=x86-64
 
|isa=x86-64
|predecessor=Isaiah II
+
|predecessor=Isaiah
|predecessor link=via_technologies/microarchitectures/isaiah ii
+
|predecessor link=via_technologies/microarchitectures/isaiah
 
|successor=WuDaoKou
 
|successor=WuDaoKou
 
|successor link=zhaoxin/microarchitectures/wudaokou
 
|successor link=zhaoxin/microarchitectures/wudaokou
 
}}
 
}}
'''ZhangJiang''' is the successor to {{via|Isaiah II|l=arch}}, a [[28 nm]] [[x86]] microarchitecture designed by [[Zhaoxin]] for mainstream laptops, desktops, and servers.
+
'''ZhangJiang''' is the successor to {{via|Isaiah|l=arch}}, a [[28 nm]] [[x86]] microarchitecture designed by [[Zhaoxin]] for mainstream laptops, desktops, and servers.
 
 
== Brands ==
 
{| class="wikitable"
 
! Family !! Series !! Description
 
|-
 
| {{zhaoxin|KaiXian}} || C/C+ (4000) || Desktop, Laptops
 
|-
 
| {{zhaoxin|Kaisheng}} || C+ (4000) || Storage, Servers
 
|}
 
 
 
== Process Technology ==
 
ZhangJiang is manufactured on [[HLMC]]'s [[28 nm process]].
 
 
 
== Architecture ==
 
It is believed that this architecture is largely based on VIA's {{via|Isaiah II|l=arch}}.
 
=== Key changes from {{via|Isaiah II|l=arch}} ===
 
* {{via|Advanced Cryptography Engine}}
 
** Support for Chinese Hash Algorithms [[SM3]] and [[SM4]]
 
{{expand list}}
 
 
 
==== New instructions ====
 
ZhangJiang introduced a number of {{x86|extensions|new instructions}}:
 
 
 
* {{x86|SM3|<code>SM3</code>}} - [[Hardware acceleration]] for SM3 hashing operations
 
* {{x86|SM4|<code>SM4</code>}} - Hardware acceleration for SM4 hashing operations
 
 
 
== Die ==
 
* TSMC's [[28 nm process]]
 
* 300,000,000 transistors
 

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codenameZhangJiang +
core count2 +, 4 + and 8 +
designerZhaoxin +
first launched2015 +
full page namezhaoxin/microarchitectures/zhangjiang +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerTSMC +
microarchitecture typeCPU +
nameZhangJiang +
process28 nm (0.028 μm, 2.8e-5 mm) +