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Latest revision | Your text | ||
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− | {{nvidia title| | + | {{nvidia title|denver}} |
{{microarchitecture | {{microarchitecture | ||
|atype=CPU | |atype=CPU |
Facts about "Denver - Microarchitectures - Nvidia"
codename | Denver + |
core count | 2 + |
designer | Nvidia + |
first launched | 2014 + |
full page name | nvidia/microarchitectures/denver + |
instance of | microarchitecture + |
instruction set architecture | ARMv8 + |
l1$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l1d$ description | 4-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
manufacturer | TSMC + |
microarchitecture type | CPU + |
name | Denver + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + and 16 nm (0.016 μm, 1.6e-5 mm) + |