From WikiChip
Editing nec/vector engine

Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.

This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.

Latest revision Your text
Line 30: Line 30:
 
== Members ==
 
== Members ==
 
=== Type 10 ===
 
=== Type 10 ===
[[File:nec vector engine type 10 water cooled model.jpg|thumb|right|Type 10 water cooled]][[File:nec vector engine type 10 pod 64 units.jpg|thumb|right|Type 10 Pod with 64 cards]]
+
{{see also|nec/microarchitectures/sx-aurora|SX-Aurora}}
{{see also|nec/microarchitectures/sx-aurora|l1=SX-Aurora}}
 
 
Vector Engine Type 10 (VE10) are first-generation Vector Engines. Those processors are based on the {{nec|SX-Aurora|l=arch}} microarchitecture and are fabricated on [[TSMC]] [[16 nm process]]. Type 10 features eight vector cores along with six [[HBM2]] stacks.
 
Vector Engine Type 10 (VE10) are first-generation Vector Engines. Those processors are based on the {{nec|SX-Aurora|l=arch}} microarchitecture and are fabricated on [[TSMC]] [[16 nm process]]. Type 10 features eight vector cores along with six [[HBM2]] stacks.
  
* '''Proc''' [[16 nm process]]
+
* ''Proc''' [[16 nm process]]
 
* '''Mem''' 24 GiB / 48 GiB
 
* '''Mem''' 24 GiB / 48 GiB
 
* '''HBM''' 4-Hi (750 GB/s) / 8-Hi (1.2 TB/s) [[HBM2]]
 
* '''HBM''' 4-Hi (750 GB/s) / 8-Hi (1.2 TB/s) [[HBM2]]
 
* '''Perf''' 2.150-2.458 [[teraFLOPS]]
 
* '''Perf''' 2.150-2.458 [[teraFLOPS]]
 
+
   
<!-- NOTE:
 
          This table is generated automatically from the data in the actual articles.
 
          If a microprocessor is missing from the list, an appropriate article for it needs to be
 
          created and tagged accordingly.
 
 
 
          Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
 
-->
 
{{comp table start}}
 
<table class="comptable sortable tc3 tc4 tc5">
 
{{comp table header|main|7:List of Vector Engine Type 10 Processors}}
 
{{comp table header|main|5:Vector Processor|2:HBM2}}
 
{{comp table header|cols|Launched|Cores|L3$|%Frequency|Performance|Memory|Bandwidth}}
 
{{#ask: [[Category:microprocessor models by nec]] [[microarchitecture::SX-Aurora]] [[series::Type 10]]
 
  |?full page name
 
|?model number
 
|?first launched
 
|?core count
 
|?l3$ size
 
|?base frequency#GHz
 
|?peak flops (double-precision)#teraFLOPS
 
|?max memory#GiB
 
|?max memory bandwidth#GB/s
 
|format=template
 
|template=proc table 3
 
|userparam=9
 
|mainlabel=-
 
}}
 
{{comp table count|ask=[[Category:microprocessor models by nec]] [[microarchitecture::SX-Aurora]] [[series::Type 10]]}}
 
</table>
 
{{comp table end}}
 
 
 
=== Type 10E ===
 
{{see also|nec/microarchitectures/sx-aurora|l1=SX-Aurora}}
 
Type 10 E was announced in late 2019 and entered production in early 2020. The new cards offer similar specifications to the prior generation but offer higher memory bandwidth (E for enhanced memory bandwidth).
 
 
 
* '''Proc''' [[16 nm process]]
 
* '''Mem''' 24 GiB / 48 GiB
 
* '''HBM''' 4-Hi (1 TB/s) / 8-Hi (1.35 TB/s) [[HBM2]]
 
* '''Perf''' 2.150-2.433 [[teraFLOPS]]
 
 
 
<!-- NOTE:
 
          This table is generated automatically from the data in the actual articles.
 
          If a microprocessor is missing from the list, an appropriate article for it needs to be
 
          created and tagged accordingly.
 
 
 
          Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
 
-->
 
{{comp table start}}
 
<table class="comptable sortable tc3 tc4 tc5">
 
{{comp table header|main|7:List of Vector Engine Type 10E Processors}}
 
{{comp table header|main|5:Vector Processor|2:HBM2}}
 
{{comp table header|cols|Launched|Cores|L3$|%Frequency|Performance|Memory|Bandwidth}}
 
{{#ask: [[Category:microprocessor models by nec]] [[microarchitecture::SX-Aurora]] [[series::Type 10E]]
 
|?full page name
 
|?model number
 
|?first launched
 
|?core count
 
|?l3$ size
 
|?base frequency#GHz
 
|?peak flops (double-precision)#teraFLOPS
 
|?max memory#GiB
 
|?max memory bandwidth#GB/s
 
|format=template
 
|template=proc table 3
 
|userparam=9
 
|mainlabel=-
 
}}
 
{{comp table count|ask=[[Category:microprocessor models by nec]] [[microarchitecture::SX-Aurora]] [[series::Type 10E]]}}
 
</table>
 
{{comp table end}}
 
 
 
=== Type 20 ===
 
[[File:nec vector engine roadmap.png|right|thumb|NEC Type 10-30 Roadmap]]
 
Type 20 is planned for the 2020-21 timeframe. NEC says it will feature higher memory bandwidth as well as higher core count and frequency.
 
 
 
=== Type 30 ===
 
Type 30 is planned for the 2022 timeframe. NEC says Type 30 will feature a new architecture as well as higher memory bandwidth and higher core count and frequency.
 
 
 
 
== See also ==
 
== See also ==
 
* [[vector processors]]
 
* [[vector processors]]

Please note that all contributions to WikiChip may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see WikiChip:Copyrights for details). Do not submit copyrighted work without permission!

Cancel | Editing help (opens in new window)
designerNEC +
first announced2017 +
full page namenec/vector engine +
instance ofintegrated circuit family +
main designerNEC +
manufacturerTSMC +
microarchitectureSX-Aurora +
nameNEC Vector Engine +
process16 nm (0.016 μm, 1.6e-5 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +