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{{loongson title|Godson-2H}} | {{loongson title|Godson-2H}} | ||
− | {{ | + | {{mpu |
| name = Godson-2H | | name = Godson-2H | ||
| image = godson-2h.jpg | | image = godson-2h.jpg | ||
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| model number = 2H | | model number = 2H | ||
| part number = | | part number = | ||
− | | part number | + | | part number 1 = |
| market = Desktop | | market = Desktop | ||
| first announced = August, 2010 | | first announced = August, 2010 | ||
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| max memory = | | max memory = | ||
− | + | | electrical = Yes | |
− | | power = | + | | power = 5 W |
| v core = | | v core = | ||
| v core tolerance = <!-- OR ... --> | | v core tolerance = <!-- OR ... --> | ||
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| socket 0 type = BGA | | socket 0 type = BGA | ||
}} | }} | ||
− | '''Godson-2H''' | + | '''Godson-2H''' is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers. Introduced in late-[[2010]], the Godson-2H operates at up to 1 GHz consuming 5 W. This chip was manufactured on [[STMicroelectronics]]' [[65 nm process]]. |
The Godson-2H is actually a complete [[system on a chip]] incorporating the [[northbridge]] along with the [[southbridge]] on-die. Additionally the Godson-2H also incorporates a low-power [[Vivante]] {{vivante|GC800}} [[IGP]] operating at 400 MHz. | The Godson-2H is actually a complete [[system on a chip]] incorporating the [[northbridge]] along with the [[southbridge]] on-die. Additionally the Godson-2H also incorporates a low-power [[Vivante]] {{vivante|GC800}} [[IGP]] operating at 400 MHz. | ||
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| max res edp = | | max res edp = | ||
| max res edp freq = | | max res edp freq = | ||
− | | max res vga = | + | | max res vga = |
| max res vga freq = | | max res vga freq = | ||
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}} | }} | ||
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== References == | == References == | ||
* Xiao, Bin, et al. "Godson-2H: a complex low power SOC in 65nm CMOS." Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on. IEEE, 2012. | * Xiao, Bin, et al. "Godson-2H: a complex low power SOC in 65nm CMOS." Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on. IEEE, 2012. | ||
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Facts about "Godson-2H - Loongson"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Godson-2H - Loongson#io + |
base frequency | 1,000 MHz (1 GHz, 1,000,000 kHz) + |
bus speed | 800 MHz (0.8 GHz, 800,000 kHz) + |
bus type | HyperTransport 1.03 + |
core count | 1 + |
core name | GS464V + |
designer | Loongson + |
die area | 117 mm² (0.181 in², 1.17 cm², 117,000,000 µm²) + |
family | Godson 2 + |
first announced | August 2010 + |
first launched | March 2011 + |
full page name | loongson/godson 2/2h + |
has ecc memory support | true + |
instance of | microprocessor + |
integrated gpu | GC800 + |
integrated gpu base frequency | 400 MHz (0.4 GHz, 400,000 KHz) + |
integrated gpu designer | Vivante + |
integrated gpu execution units | 4 + |
isa | MIPS64 + |
isa family | MIPS + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 4-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
ldate | March 2011 + |
main image | + |
main image caption | Godson-2H chip + |
manufacturer | STMicroelectronics + |
market segment | Desktop + |
max cpu count | 1 + |
max memory bandwidth | 11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) + |
max memory channels | 1 + |
max pcie lanes | 4 + |
microarchitecture | GS464V + |
model number | 2H + |
name | Godson-2H + |
power dissipation | 10 W (10,000 mW, 0.0134 hp, 0.01 kW) + |
process | 65 nm (0.065 μm, 6.5e-5 mm) + |
series | Godson 2 + |
smp max ways | 1 + |
supported memory type | DDR3-800 + |
technology | CMOS + |
thread count | 1 + |
transistor count | 152,000,000 + |
word size | 64 bit (8 octets, 16 nibbles) + |