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| {{intel title|Xeon Platinum 8160}} | | {{intel title|Xeon Platinum 8160}} |
− | {{chip | + | {{mpu |
− | |name=Xeon Platinum 8160 | + | | future = Yes |
− | |image=skylake sp (basic).png | + | | name = Xeon Platinum 8160 |
− | |designer=Intel | + | | no image = Yes |
− | |manufacturer=Intel | + | | image = |
− | |model number=8160 | + | | image size = |
− | |part number=BX806738160 | + | | caption = |
− | |part number 2=CD8067303405600 | + | | designer = Intel |
− | |s-spec=SR3B0 | + | | manufacturer = Intel |
− | |s-spec qs=QMRV | + | | model number = 8160 |
− | |market=Server | + | | part number = CD8067303405600 |
− | |first announced=April 25, 2017 | + | | part number 1 = |
− | |first launched=July 11, 2017 | + | | part number 2 = |
− | |release price=$4702.00 | + | | s-spec = SR3B0 |
− | |family=Xeon Platinum | + | | s-spec 2 = |
− | |series=8000 | + | | market = Server |
− | |frequency=2,100 MHz
| + | | first announced = April 25, 2017 |
− | |turbo frequency1=3,700 MHz
| + | | first launched = |
− | |turbo frequency=Yes
| + | | last order = |
− | |clock multiplier=21
| + | | last shipment = |
− | |cpuid=0x50654
| + | | release price = |
− | |isa=x86-64
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− | |isa family=x86
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− | |microarch=Skylake (server)
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− | |platform=Purley
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− | |chipset=Lewisburg
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− | |core name=Skylake SP
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− | |core family=6
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− | |core stepping=H0
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− | |process=14 nm
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− | |technology=CMOS
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− | |word size=64 bit
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− | |core count=24
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− | |thread count=48
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− | |max memory=768 GiB
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− | |max cpus=8
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− | |smp interconnect=UPI
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− | |smp interconnect links=3
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− | |smp interconnect rate=10.4 GT/s
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− | |tdp=150 W
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− | |tcase min=0 °C
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− | |tcase max=85 °C
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− | |dts min=0 °C
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− | |dts max=95 °C
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− | |package name 1=intel,fclga_3647
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− | |successor=Xeon Platinum 8260
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− | |successor link=intel/xeon_platinum/8260
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− | }}
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− | '''Xeon Platinum 8160''' is a {{arch|64}} [[24-core]] [[x86]] multi-socket highest performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8160, which is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 150 W and a {{intel|turbo boost}} frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
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− | | |
− | == Cache ==
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− | {{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}}
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− | {{cache size
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− | |l1 cache=1.5 MiB
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− | |l1i cache=768 KiB
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− | |l1i break=24x32 KiB
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− | |l1i desc=8-way set associative
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− | |l1d cache=768 KiB
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− | |l1d break=24x32 KiB
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− | |l1d desc=8-way set associative
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− | |l1d policy=write-back
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− | |l2 cache=24 MiB
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− | |l2 break=24x1 MiB
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− | |l2 desc=16-way set associative
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− | |l2 policy=write-back
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− | |l3 cache=33 MiB
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− | |l3 break=24x1.375 MiB
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− | |l3 desc=11-way set associative
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− | |l3 policy=write-back
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− | }}
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− | | |
− | == Memory controller ==
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− | {{memory controller
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− | |type=DDR4-2666
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− | |ecc=Yes
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− | |max mem=768 GiB
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− | |controllers=2
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− | |channels=6
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− | |max bandwidth=119.21 GiB/s
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− | |bandwidth schan=19.87 GiB/s
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− | |bandwidth dchan=39.74 GiB/s
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− | |bandwidth qchan=79.47 GiB/s
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− | |bandwidth hchan=119.21 GiB/s
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− | }}
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| | | |
− | == Expansions == | + | | family = Xeon Platinum |
− | {{expansions
| + | | series = 8100 |
− | | pcie revision = 3.0 | + | | locked = Yes |
− | | pcie lanes = 48 | + | | frequency = 2.1 GHz |
− | | pcie config = x16 | + | | turbo frequency = |
− | | pcie config 2 = x8 | + | | turbo frequency1 = |
− | | pcie config 3 = x4 | + | | turbo frequency2 = |
− | }}
| + | | turbo frequency3 = |
| + | | turbo frequency4 = |
| + | | turbo frequency5 = |
| + | | turbo frequency6 = |
| + | | turbo frequency7 = |
| + | | turbo frequency8 = |
| + | | bus type = DMI 3.0 |
| + | | bus speed = |
| + | | bus rate = 8 GT/s |
| + | | bus links = 4 |
| + | | clock multiplier = 21 |
| + | | cpuid = |
| + | | cpuid 2 = |
| | | |
− | == Features == | + | | isa family = x86-64 |
− | {{x86 features
| + | | isa = x86 |
− | |real=Yes | + | | microarch = Skylake |
− | |protected=Yes
| + | | platform = Purley |
− | |smm=Yes
| + | | chipset = Lewisburg |
− | |fpu=Yes
| + | | core name = Skylake SP |
− | |x8616=Yes
| + | | core family = |
− | |x8632=Yes
| + | | core model = |
− | |x8664=Yes
| + | | core stepping = H0 |
− | |nx=Yes | + | | process = 14 nm |
− | |mmx=Yes | + | | transistors = |
− | |emmx=Yes | + | | technology = CMOS |
− | |sse=Yes | + | | die area = <!-- XX mm² --> |
− | |sse2=Yes | + | | die width = |
− | |sse3=Yes | + | | die length = |
− | |ssse3=Yes | + | | word size = 64 bit |
− | |sse41=Yes | + | | core count = |
− | |sse42=Yes | + | | thread count = |
− | |sse4a=No | + | | max cpus = 8 |
− | |avx=Yes | + | | max memory = |
− | |avx2=Yes | |
− | |avx512f=Yes | |
− | |avx512cd=Yes | |
− | |avx512er=No | |
− | |avx512pf=No | |
− | |avx512bw=Yes | |
− | |avx512dq=Yes | |
− | |avx512vl=Yes
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− | |avx512ifma=No
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− | |avx512vbmi=No
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− | |avx5124fmaps=No
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− | |avx5124vnniw=No
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− | |avx512vpopcntdq=No
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− | |abm=Yes
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− | |tbm=No
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− | |bmi1=Yes
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− | |bmi2=Yes
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− | |fma3=Yes
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− | |fma4=No
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− | |aes=Yes
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− | |rdrand=Yes
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− | |sha=No
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− | |xop=No
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− | |adx=Yes
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− | |clmul=Yes
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− | |f16c=Yes
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− | |tbt1=No
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− | |tbt2=Yes
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− | |tbmt3=No
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− | |bpt=No
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− | |eist=Yes
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− | |sst=Yes
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− | |flex=No
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− | |fastmem=No
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− | |ivmd=Yes
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− | |intelnodecontroller=Yes
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− | |intelnode=Yes
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− | |kpt=Yes
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− | |ptt=Yes
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− | |intelrunsure=Yes
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− | |mbe=Yes
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− | |isrt=No
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− | |sba=No
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− | |mwt=No
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− | |sipp=No
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− | |att=No
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− | |ipt=No
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− | |tsx=Yes
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− | |txt=Yes
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− | |ht=Yes
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− | |vpro=Yes
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− | |vtx=Yes
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− | |vtd=Yes
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− | |ept=Yes
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− | |mpx=No
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− | |sgx=No
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− | |securekey=No
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− | |osguard=No
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− | |3dnow=No
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− | |e3dnow=No
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− | |smartmp=No
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− | |powernow=No
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− | |amdvi=No
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− | |amdv=No
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− | |amdsme=No
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− | |amdtsme=No
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− | |amdsev=No
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− | |rvi=No
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− | |smt=No
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− | |sensemi=No
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− | |xfr=No
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− | }}
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| | | |
− | == Frequencies ==
| + | | electrical = |
− | {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}}
| + | | power = |
− | {{frequency table
| + | | average power = |
− | |freq_base=2,100 MHz | + | | idle power = |
− | |freq_1=3,700 MHz | + | | v core = |
− | |freq_2=3,700 MHz | + | | v core tolerance = <!-- OR ... --> |
− | |freq_3=3,500 MHz | + | | v core min = |
− | |freq_4=3,500 MHz | + | | v core max = |
− | |freq_5=3,400 MHz | + | | v io = |
− | |freq_6=3,400 MHz | + | | v io tolerance = |
− | |freq_7=3,400 MHz
| + | | v io 2 = <!-- OR ... --> |
− | |freq_8=3,400 MHz
| + | | v io 3 = |
− | |freq_9=3,400 MHz | + | | sdp = |
− | |freq_10=3,400 MHz | + | | tdp = |
− | |freq_11=3,400 MHz | + | | tdp typical = |
− | |freq_12=3,400 MHz
| + | | ctdp down = |
− | |freq_13=3,200 MHz
| + | | ctdp down frequency = |
− | |freq_14=3,200 MHz
| + | | ctdp up = |
− | |freq_15=3,200 MHz
| + | | ctdp up frequency = |
− | |freq_16=3,200 MHz
| + | | temp min = <!-- use TJ/TC whenever possible instead --> |
− | |freq_17=3,000 MHz
| + | | temp max = |
− | |freq_18=3,000 MHz
| + | | tjunc min = <!-- .. °C --> |
− | |freq_19=3,000 MHz
| + | | tjunc max = |
− | |freq_20=3,000 MHz
| + | | tcase min = |
− | |freq_21=2,800 MHz
| + | | tcase max = |
− | |freq_22=2,800 MHz
| + | | tstorage min = |
− | |freq_23=2,800 MHz
| + | | tstorage max = |
− | |freq_24=2,800 MHz
| + | | tambient min = |
− | |freq_avx2_base=1,800 MHz
| + | | tambient max = |
− | |freq_avx2_1=3,600 MHz
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− | |freq_avx2_2=3,600 MHz
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− | |freq_avx2_3=3,400 MHz | |
− | |freq_avx2_4=3,400 MHz
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− | |freq_avx2_5=3,300 MHz | |
− | |freq_avx2_6=3,300 MHz | |
− | |freq_avx2_7=3,300 MHz | |
− | |freq_avx2_8=3,300 MHz | |
− | |freq_avx2_9=3,200 MHz | |
− | |freq_avx2_10=3,200 MHz | |
− | |freq_avx2_11=3,200 MHz | |
− | |freq_avx2_12=3,200 MHz | |
− | |freq_avx2_13=2,900 MHz | |
− | |freq_avx2_14=2,900 MHz | |
− | |freq_avx2_15=2,900 MHz | |
− | |freq_avx2_16=2,900 MHz | |
− | |freq_avx2_17=2,600 MHz | |
− | |freq_avx2_18=2,600 MHz | |
− | |freq_avx2_19=2,600 MHz | |
− | |freq_avx2_20=2,600 MHz | |
− | |freq_avx2_21=2,500 MHz | |
− | |freq_avx2_22=2,500 MHz
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− | |freq_avx2_23=2,500 MHz
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− | |freq_avx2_24=2,500 MHz
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− | |freq_avx512_base=1,400 MHz
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− | |freq_avx512_1=3,500 MHz
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− | |freq_avx512_2=3,500 MHz
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− | |freq_avx512_3=3,300 MHz
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− | |freq_avx512_4=3,300 MHz
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− | |freq_avx512_5=3,000 MHz
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− | |freq_avx512_6=3,000 MHz
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− | |freq_avx512_7=3,000 MHz
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− | |freq_avx512_8=3,000 MHz
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− | |freq_avx512_9=2,600 MHz
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− | |freq_avx512_10=2,600 MHz
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− | |freq_avx512_11=2,600 MHz
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− | |freq_avx512_12=2,600 MHz
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− | |freq_avx512_13=2,300 MHz
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− | |freq_avx512_14=2,300 MHz
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− | |freq_avx512_15=2,300 MHz
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− | |freq_avx512_16=2,300 MHz
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− | |freq_avx512_17=2,100 MHz
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− | |freq_avx512_18=2,100 MHz
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− | |freq_avx512_19=2,100 MHz
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− | |freq_avx512_20=2,100 MHz
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− | |freq_avx512_21=2,000 MHz
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− | |freq_avx512_22=2,000 MHz
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− | |freq_avx512_23=2,000 MHz
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− | |freq_avx512_24=2,000 MHz
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− | }}
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| | | |
− | == Benchmarks == | + | | package module 1 = |
− | {{benchmarks main
| + | | package module 2 = |
− | |
| + | <!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE --------------> |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00172.html|test_timestamp=2017-10-07 20:29:33-0400|chip_count=2|core_count=48|copies_count=96|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Platinum 8160)|SPECrate2017_int_base=225|SPECrate2017_int_peak=}}
| + | | packaging = Yes |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00173.html|test_timestamp=2017-10-08 23:42:35-0400|chip_count=2|core_count=48|thread_count=48|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Platinum 8160)|SPECspeed2017_int_base=8.9|SPECspeed2017_int_peak=9.21}}
| + | | package 0 = FCLGA-3647 |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00182.html|test_timestamp=2017-10-09 04:42:42-0400|chip_count=2|core_count=48|thread_count=48|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Platinum 8160)|SPECspeed2017_fp_base=121|SPECspeed2017_fp_peak=123}}
| + | | package 0 type = LGA |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00190.html|test_timestamp=2017-10-08 02:00:13-0400|chip_count=2|core_count=48|copies_count=96|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Platinum 8160)|SPECrate2017_fp_base=208|SPECrate2017_fp_peak=}}
| + | | package 0 pins = 3647 |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171030-00245.html|test_timestamp=2017-10-15 21:16:30-0400|chip_count=4|core_count=96|copies_count=192|vendor=Dell Inc.|system=PowerEdge R940 (Intel Xeon Platinum 8160, 2.10 GHz)|SPECrate2017_fp_base=417|SPECrate2017_fp_peak=424}}
| + | | package 0 pitch = |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171030-00248.html|test_timestamp=2017-10-15 03:51:07-0400|chip_count=4|core_count=96|thread_count=96|vendor=Dell Inc.|system=PowerEdge R940 (Intel Xeon Platinum 8160, 2.10 GHz)|SPECspeed2017_int_base=9.03|SPECspeed2017_int_peak=9.3}}
| + | | package 0 width = |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171030-00255.html|test_timestamp=2017-10-15 08:50:07-0400|chip_count=4|core_count=96|thread_count=96|vendor=Dell Inc.|system=PowerEdge R940 (Intel Xeon Platinum 8160, 2.10 GHz)|SPECspeed2017_fp_base=171|SPECspeed2017_fp_peak=173}}
| + | | package 0 length = |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171030-00263.html|test_timestamp=2017-10-15 10:33:13-0400|chip_count=4|core_count=96|copies_count=192|vendor=Dell Inc.|system=PowerEdge R940 (Intel Xeon Platinum 8160, 2.10 GHz)|SPECrate2017_int_base=453|SPECrate2017_int_peak=480}}
| + | | package 0 height = |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00362.html|test_timestamp=2017-10-27 13:42:48-0400|chip_count=4|core_count=96|thread_count=96|vendor=HPE|system=ProLiant DL560 Gen10 (2.10 GHz, Intel Xeon Platinum 8160)|SPECspeed2017_fp_base=168|SPECspeed2017_fp_peak=}}
| + | | socket 0 = LGA-3647 |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00406.html|test_timestamp=2017-10-27 11:09:36-0400|chip_count=4|core_count=96|thread_count=96|vendor=HPE|system=ProLiant DL560 Gen10 (2.10 GHz, Intel Xeon Platinum 8160)|SPECspeed2017_int_base=8.86|SPECspeed2017_int_peak=}}
| + | | socket 0 type = LGA |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00438.html|test_timestamp=2017-10-26 19:00:57-0400|chip_count=4|core_count=96|copies_count=192|vendor=HPE|system=ProLiant DL560 Gen10 (2.10 GHz, Intel Xeon Platinum 8160)|SPECrate2017_fp_base=399|SPECrate2017_fp_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00471.html|test_timestamp=2017-10-26 13:16:02-0400|chip_count=4|core_count=96|copies_count=192|vendor=HPE|system=ProLiant DL560 Gen10 (2.10 GHz, Intel Xeon Platinum 8160)|SPECrate2017_int_base=431|SPECrate2017_int_peak=}}
| |
| }} | | }} |
| + | '''Xeon Platinum 8160''' is a {{arch|64}} [[x86]] high-performance server [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 8160 operates at 2.1 GHz. |
| | | |
− | == External Benchmarking ==
| |
− | * [https://repositories.lib.utexas.edu/handle/2152/61472 Benchmarking the Intel® Xeon® Platinum 8160 Processor], Gómez-Iglesias, Antonio, et al. University of Texas at Austin
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| | | |
− | [[Category:microprocessor models by intel based on skylake extreme core count die]]
| + | {{unknown features}} |