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{{intel title|Xeon Gold 6161}}
 
{{intel title|Xeon Gold 6161}}
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{{chip
+
{{mpu
−
|future=Yes
+
| future             = Yes
−
|name=Xeon Gold 6161
+
| name               = Xeon Gold 6161
−
|no image=Yes
+
| no image           = Yes
−
|designer=Intel
+
| image              =
−
|manufacturer=Intel
+
| image size          =
−
|model number=6161
+
| caption            =
−
|market=Server
+
| designer           = Intel
−
|family=Xeon Gold
+
| manufacturer       = Intel
−
|series=6100
+
| model number       = 6161
−
|locked=Yes
+
| part number        =
−
|frequency=2,200 MHz
+
| part number 1      =
−
|turbo frequency1=3,000 MHz
+
| part number 2      =
−
|turbo frequency=Yes
+
| s-spec              =
−
|bus type=DMI 3.0
+
| s-spec 2            =
−
|bus links=4
+
| market             = Server
−
|bus rate=8 GT/s
+
| first announced    =
−
|clock multiplier=22
+
| first launched      =
−
|isa=x86-64
+
| last order          =
−
|isa family=x86
+
| last shipment      =
−
|microarch=Skylake (server)
+
| release price      =
−
|platform=Purley
+
 
−
|chipset=Lewisburg
+
| family             = Xeon Gold
−
|core name=Skylake SP
+
| series             = 6100
−
|core family=6
+
| locked             = Yes
−
|core stepping=H0
+
| frequency           = 2,200 MHz
−
|process=14 nm
+
| turbo frequency    = Yes
−
|technology=CMOS
+
| turbo frequency1   = 3,000 MHz
−
|die area=<!-- XX mm² -->
+
| turbo frequency2    =
−
|word size=64 bit
+
| turbo frequency3    =
−
|core count=22
+
| turbo frequency4    =
−
|thread count=44
+
| turbo frequency5    =
−
|max cpus=4
+
| turbo frequency6    =
−
|v core tolerance=<!-- OR ... -->
+
| turbo frequency7    =
−
|v io 2=<!-- OR ... -->
+
| turbo frequency8    =  
−
|tdp=165 W
+
| bus type           = DMI 3.0
−
|temp min=<!-- use TJ/TC whenever possible instead -->
+
| bus speed          =  
−
|tjunc min=<!-- .. °C -->
+
| bus rate           = 8 GT/s
−
|package module 2=<!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE -------------->
+
| bus links          = 4
−
|package name 1=intel,fclga_3647
+
| clock multiplier   = 22
 +
| cpuid              =
 +
| cpuid 2            =
 +
 
 +
| isa family          = x86-64
 +
| isa                 = x86
 +
| microarch           = Skylake
 +
| platform           = Purley
 +
| chipset             = Lewisburg
 +
| core name           = Skylake SP
 +
| core family         =
 +
| core model          =  
 +
| core stepping       = H0
 +
| process             = 14 nm
 +
| transistors        =
 +
| technology         = CMOS
 +
| die area           = <!-- XX mm² -->
 +
| die width          =
 +
| die length          =
 +
| word size           = 64 bit
 +
| core count         = 22
 +
| thread count       = 44
 +
| max cpus           = 2
 +
| max memory          =
 +
 
 +
| electrical          =
 +
| power              =
 +
| average power      =
 +
| idle power          =
 +
| v core              =  
 +
| v core tolerance   = <!-- OR ... -->
 +
| v core min          =
 +
| v core max          =
 +
| v io                =
 +
| v io tolerance      =
 +
| v io 2             = <!-- OR ... -->
 +
| v io 3              =
 +
| sdp                =
 +
| tdp                 = 165 W
 +
| tdp typical        =
 +
| ctdp down          =
 +
| ctdp down frequency =
 +
| ctdp up            =
 +
| ctdp up frequency  =
 +
| temp min           = <!-- use TJ/TC whenever possible instead -->
 +
| temp max            =
 +
| tjunc min           = <!-- .. °C -->
 +
| tjunc max          =
 +
| tcase min          =
 +
| tcase max          =
 +
| tstorage min        =
 +
| tstorage max        =
 +
| tambient min        =
 +
| tambient max        =
 +
 
 +
| package module 1    =
 +
| package module 2   =  
 +
<!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE -------------->
 +
| packaging          = Yes
 +
| package 0          = FCLGA-3647
 +
| package 0 type      = LGA
 +
| package 0 pins      = 3647
 +
| package 0 pitch    =
 +
| package 0 width    =
 +
| package 0 length    =
 +
| package 0 height    =
 +
| socket 0            = LGA-3647
 +
| socket 0 type      = LGA
 
}}
 
}}
−
'''Xeon Gold 6161''' is a {{arch|64}} [[x86]] high-performance server [[docosa-core]] [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 6161 operates at 2.2 GHz with a TDP of 165 W and a {{intel|Turbo Boost|turbo frequency}} of 3 GHz.
+
'''Xeon Gold 6161''' is a {{arch|64}} [[x86]] high-performance server [[docosa-core]] [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 6161 operates at 2.2 GHz with a TDP of 165 W and a {{intel|Turbo Boost|turbo frequency}} of 3 GHz.
  
  
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== Cache ==
 
== Cache ==
−
{{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}}
+
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 
{{cache size
 
{{cache size
 
|l1 cache=1.375 MiB
 
|l1 cache=1.375 MiB
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|avx=Yes
 
|avx=Yes
 
|avx2=Yes
 
|avx2=Yes
−
 
+
|avx512=Yes
 
|abm=Yes
 
|abm=Yes
 
|tbm=No
 
|tbm=No
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|xfr=No
 
|xfr=No
 
}}
 
}}
−
 
−
[[Category:microprocessor models by intel based on skylake extreme core count die]]
 

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Facts about "Xeon Gold 6161 - Intel"
RDF feed
base frequency2,200 MHz (2.2 GHz, 2,200,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipsetLewisburg +
clock multiplier22 +
core count22 +
core family6 +
core nameSkylake SP +
core steppingH0 +
designerIntel +
familyXeon Gold +
full page nameintel/xeon gold/6161 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Encryption Standard Instruction Set Extension +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Enhanced SpeedStep Technology +, Extended Page Tables +, Hyper-Threading Technology +, Intel VT-d +, Intel VT-x +, Intel vPro Technology +, Memory Protection Extensions +, OS Guard + and Transactional Synchronization Extensions +
has intel enhanced speedstep technologytrue +
has intel supervisor mode execution protectiontrue +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size1,408 KiB (1,441,792 B, 1.375 MiB) +
l1d$ description8-way set associative +
l1d$ size704 KiB (720,896 B, 0.688 MiB) +
l1i$ description8-way set associative +
l1i$ size704 KiB (720,896 B, 0.688 MiB) +
l2$ description16-way set associative +
l2$ size22 MiB (22,528 KiB, 23,068,672 B, 0.0215 GiB) +
l3$ description11-way set associative +
l3$ size30.25 MiB (30,976 KiB, 31,719,424 B, 0.0295 GiB) +
ldate3000 +
manufacturerIntel +
market segmentServer +
max cpu count4 +
max memory bandwidth119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) +
max memory channels6 +
microarchitectureSkylake (server) +
model number6161 +
nameXeon Gold 6161 +
packageFCLGA-3647 +
platformPurley +
process14 nm (0.014 μm, 1.4e-5 mm) +
series6100 +
smp max ways4 +
socketLGA-3647 + and Socket P +
supported memory typeDDR4-2666 +
tdp165 W (165,000 mW, 0.221 hp, 0.165 kW) +
technologyCMOS +
thread count44 +
turbo frequency (1 core)3,000 MHz (3 GHz, 3,000,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +