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| {{intel title|Xeon Gold 6130}} | | {{intel title|Xeon Gold 6130}} |
− | {{chip | + | {{mpu |
− | |name=Xeon Gold 6130 | + | | future = Yes |
− | |image=skylake sp (basic).png | + | | name = Xeon Gold 6130 |
− | |designer=Intel | + | | no image = Yes |
− | |manufacturer=Intel | + | | image = |
− | |model number=6130 | + | | image size = |
− | |part number=BX806736130 | + | | caption = |
− | |part number 2=CD8067303409000 | + | | designer = Intel |
− | |s-spec=SR3B9 | + | | manufacturer = Intel |
− | |s-spec qs=QMS6 | + | | model number = 6130 |
− | |market=Server | + | | part number = CD8067303409000 |
− | |first announced=April 25, 2017 | + | | part number 1 = |
− | |first launched=July 11, 2017 | + | | part number 2 = |
− | |release price=$1894.00 | + | | s-spec = SR3B9 |
− | |family=Xeon Gold | + | | s-spec 2 = |
− | |series=6100 | + | | market = Server |
− | |locked=Yes
| + | | first announced = April 25, 2017 |
− | |frequency=2,100 MHz
| + | | first launched = |
− | |turbo frequency1=3,700 MHz
| + | | last order = |
− | |bus type=DMI 3.0
| + | | last shipment = |
− | |bus links=4
| + | | release price = |
− | |bus rate=8 GT/s
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− | |clock multiplier=21
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− | |cpuid=0x50654
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− | |isa=x86-64
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− | |isa family=x86
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− | |microarch=Skylake (server)
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− | |platform=Purley
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− | |chipset=Lewisburg
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− | |core name=Skylake SP
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− | |core family=6
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− | |core stepping=H0
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− | |process=14 nm
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− | |technology=CMOS
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− | |word size=64 bit
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− | |core count=16
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− | |thread count=32
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− | |max memory=768 GiB
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− | |max cpus=4
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− | |smp interconnect=UPI
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− | |smp interconnect links=3
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− | |smp interconnect rate=10.4 GT/s
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− | |tdp=125 W
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− | |tcase min=0 °C
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− | |tcase max=87 °C
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− | |dts min=0 °C
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− | |dts max=96 °C
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− | |package name 1=intel,fclga_3647
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− | |successor=Xeon Gold 6230
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− | |successor link=intel/xeon_gold/6230
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− | }}
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− | '''Xeon Gold 6130''' is a {{arch|64}} [[16-core]] [[x86]] multi-socket high performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 6130, which is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 125 W and a {{intel|turbo boost}} frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
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| | | |
− | == Cache == | + | | family = Xeon Gold |
− | {{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}}
| + | | series = 6100 |
− | {{cache size
| + | | locked = Yes |
− | |l1 cache=1 MiB | + | | frequency = 2.1 GHz |
− | |l1i cache=512 KiB | + | | turbo frequency = |
− | |l1i break=16x32 KiB | + | | turbo frequency1 = |
− | |l1i desc=8-way set associative | + | | turbo frequency2 = |
− | |l1d cache=512 KiB | + | | turbo frequency3 = |
− | |l1d break=16x32 KiB | + | | turbo frequency4 = |
− | |l1d desc=8-way set associative | + | | turbo frequency5 = |
− | |l1d policy=write-back | + | | turbo frequency6 = |
− | |l2 cache=16 MiB | + | | turbo frequency7 = |
− | |l2 break=16x1 MiB | + | | turbo frequency8 = |
− | |l2 desc=16-way set associative | + | | bus type = DMI 3.0 |
− | |l2 policy=write-back | + | | bus speed = |
− | |l3 cache=22 MiB | + | | bus rate = 8 GT/s |
− | |l3 break=16x1.375 MiB | + | | bus links = 4 |
− | |l3 desc=11-way set associative | + | | clock multiplier = 21 |
− | |l3 policy=write-back | + | | cpuid = |
− | }}
| + | | cpuid 2 = |
| | | |
− | == Memory controller == | + | | isa family = x86-64 |
− | {{memory controller
| + | | isa = x86 |
− | |type=DDR4-2666 | + | | microarch = Skylake |
− | |ecc=Yes | + | | platform = Purley |
− | |max mem=768 GiB | + | | chipset = Lewisburg |
− | |controllers=2 | + | | core name = Skylake SP |
− | |channels=6 | + | | core family = |
− | |max bandwidth=119.21 GiB/s | + | | core model = |
− | |bandwidth schan=19.87 GiB/s | + | | core stepping = H0 |
− | |bandwidth dchan=39.74 GiB/s | + | | process = 14 nm |
− | |bandwidth qchan=79.47 GiB/s | + | | transistors = |
− | |bandwidth hchan=119.21 GiB/s | + | | technology = CMOS |
− | }}
| + | | die area = <!-- XX mm² --> |
| + | | die width = |
| + | | die length = |
| + | | word size = 64 bit |
| + | | core count = |
| + | | thread count = |
| + | | max cpus = |
| + | | max memory = |
| | | |
− | == Expansions == | + | | electrical = |
− | {{expansions
| + | | power = |
− | | pcie revision = 3.0 | + | | average power = |
− | | pcie lanes = 48 | + | | idle power = |
− | | pcie config = x16 | + | | v core = |
− | | pcie config 2 = x8 | + | | v core tolerance = <!-- OR ... --> |
− | | pcie config 3 = x4 | + | | v core min = |
− | }}
| + | | v core max = |
| + | | v io = |
| + | | v io tolerance = |
| + | | v io 2 = <!-- OR ... --> |
| + | | v io 3 = |
| + | | sdp = |
| + | | tdp = |
| + | | tdp typical = |
| + | | ctdp down = |
| + | | ctdp down frequency = |
| + | | ctdp up = |
| + | | ctdp up frequency = |
| + | | temp min = <!-- use TJ/TC whenever possible instead --> |
| + | | temp max = |
| + | | tjunc min = <!-- .. °C --> |
| + | | tjunc max = |
| + | | tcase min = |
| + | | tcase max = |
| + | | tstorage min = |
| + | | tstorage max = |
| + | | tambient min = |
| + | | tambient max = |
| | | |
− | == Features ==
| + | | package module 1 = |
− | {{x86 features
| + | | package module 2 = |
− | |real=Yes
| + | <!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE --------------> |
− | |protected=Yes
| + | | packaging = Yes |
− | |smm=Yes
| + | | package 0 = FCLGA-3647 |
− | |fpu=Yes
| + | | package 0 type = LGA |
− | |x8616=Yes
| + | | package 0 pins = 3647 |
− | |x8632=Yes
| + | | package 0 pitch = |
− | |x8664=Yes
| + | | package 0 width = |
− | |nx=Yes
| + | | package 0 length = |
− | |mmx=Yes
| + | | package 0 height = |
− | |emmx=Yes
| + | | socket 0 = LGA-3647 |
− | |sse=Yes
| + | | socket 0 type = LGA |
− | |sse2=Yes
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− | |sse3=Yes
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− | |ssse3=Yes
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− | |sse41=Yes
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− | |sse42=Yes
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− | |sse4a=No
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− | |avx=Yes
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− | |avx2=Yes
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− | |avx512f=Yes
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− | |avx512cd=Yes
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− | |avx512er=No
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− | |avx512pf=No
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− | |avx512bw=Yes
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− | |avx512dq=Yes
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− | |avx512vl=Yes
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− | |avx512ifma=No
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− | |avx512vbmi=No
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− | |avx5124fmaps=No
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− | |avx5124vnniw=No
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− | |avx512vpopcntdq=No
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− | |abm=Yes
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− | |tbm=No
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− | |bmi1=Yes
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− | |bmi2=Yes
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− | |fma3=Yes
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− | |fma4=No
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− | |aes=Yes
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− | |rdrand=Yes
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− | |sha=No
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− | |xop=No
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− | |adx=Yes
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− | |clmul=Yes
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− | |f16c=Yes
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− | |tbt1=No
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− | |tbt2=Yes
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− | |tbmt3=No
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− | |bpt=No
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− | |eist=Yes
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− | |sst=Yes
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− | |flex=No
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− | |fastmem=No
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− | |ivmd=Yes
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− | |intelnodecontroller=Yes
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− | |intelnode=Yes
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− | |kpt=Yes
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− | |ptt=Yes
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− | |intelrunsure=Yes
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− | |mbe=Yes
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− | |isrt=No
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− | |sba=No
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− | |mwt=No
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− | |sipp=No
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− | |att=No
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− | |ipt=No | |
− | |tsx=Yes | |
− | |txt=Yes
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− | |ht=Yes | |
− | |vpro=Yes | |
− | |vtx=Yes
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− | |vtd=Yes
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− | |ept=Yes
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− | |mpx=No
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− | |sgx=No
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− | |securekey=No
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− | |osguard=No
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− | |3dnow=No
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− | |e3dnow=No
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− | |smartmp=No
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− | |powernow=No
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− | |amdvi=No
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− | |amdv=No | |
− | |amdsme=No | |
− | |amdtsme=No | |
− | |amdsev=No | |
− | |rvi=No | |
− | |smt=No | |
− | |sensemi=No | |
− | |xfr=No | |
| }} | | }} |
| + | '''Xeon Gold 6130''' is a {{arch|64}} [[x86]] high-performance server [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 6130 operates at 2.1 GHz |
| | | |
− | == Frequencies ==
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− | {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}}
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− | {{frequency table
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− | |freq_base=2,100 MHz
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− | |freq_1=3,700 MHz
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− | |freq_2=3,700 MHz
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− | |freq_3=3,500 MHz
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− | |freq_4=3,500 MHz
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− | |freq_5=3,400 MHz
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− | |freq_6=3,400 MHz
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− | |freq_7=3,400 MHz
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− | |freq_8=3,400 MHz
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− | |freq_9=3,100 MHz
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− | |freq_10=3,100 MHz
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− | |freq_11=3,100 MHz
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− | |freq_12=3,100 MHz
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− | |freq_13=2,800 MHz
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− | |freq_14=2,800 MHz
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− | |freq_15=2,800 MHz
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− | |freq_16=2,800 MHz
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− | |freq_avx2_base=1,700 MHz
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− | |freq_avx2_1=3,600 MHz
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− | |freq_avx2_2=3,600 MHz
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− | |freq_avx2_3=3,400 MHz
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− | |freq_avx2_4=3,400 MHz
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− | |freq_avx2_5=3,100 MHz
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− | |freq_avx2_6=3,100 MHz
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− | |freq_avx2_7=3,100 MHz
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− | |freq_avx2_8=3,100 MHz
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− | |freq_avx2_9=2,600 MHz
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− | |freq_avx2_10=2,600 MHz
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− | |freq_avx2_11=2,600 MHz
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− | |freq_avx2_12=2,600 MHz
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− | |freq_avx2_13=2,400 MHz
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− | |freq_avx2_14=2,400 MHz
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− | |freq_avx2_15=2,400 MHz
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− | |freq_avx2_16=2,400 MHz
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− | |freq_avx512_base=1,300 MHz
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− | |freq_avx512_1=3,500 MHz
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− | |freq_avx512_2=3,500 MHz
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− | |freq_avx512_3=3,100 MHz
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− | |freq_avx512_4=3,100 MHz
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− | |freq_avx512_5=2,400 MHz
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− | |freq_avx512_6=2,400 MHz
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− | |freq_avx512_7=2,400 MHz
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− | |freq_avx512_8=2,400 MHz
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− | |freq_avx512_9=2,100 MHz
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− | |freq_avx512_10=2,100 MHz
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− | |freq_avx512_11=2,100 MHz
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− | |freq_avx512_12=2,100 MHz
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− | |freq_avx512_13=1,900 MHz
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− | |freq_avx512_14=1,900 MHz
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− | |freq_avx512_15=1,900 MHz
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− | |freq_avx512_16=1,900 MHz
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− | }}
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− |
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− | == Benchmarks ==
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− | {{benchmarks main
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− | |
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00138.html|test_timestamp=2017-10-06 14:40:15-0400|chip_count=2|core_count=32|thread_count=32|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6130)|SPECspeed2017_fp_base=105|SPECspeed2017_fp_peak=}}
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00143.html|test_timestamp=2017-10-06 11:47:45-0400|chip_count=2|core_count=32|thread_count=32|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6130)|SPECspeed2017_int_base=8.75|SPECspeed2017_int_peak=}}
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00204.html|test_timestamp=2017-10-06 21:55:36-0400|chip_count=2|core_count=32|copies_count=64|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6130)|SPECrate2017_fp_base=165|SPECrate2017_fp_peak=}}
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00210.html|test_timestamp=2017-10-06 16:19:31-0400|chip_count=2|core_count=32|copies_count=64|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Gold 6130)|SPECrate2017_int_base=162|SPECrate2017_int_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171018-00220.html|test_timestamp=2017-10-18 03:16:28-0400|chip_count=2|core_count=32|copies_count=64|vendor=Dell Inc.|system=PowerEdge R440 (Intel Xeon Gold 6130, 2.10 GHz)|SPECrate2017_fp_base=163|SPECrate2017_fp_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171018-00221.html|test_timestamp=2017-10-17 22:07:26-0400|chip_count=2|core_count=32|copies_count=64|vendor=Dell Inc.|system=PowerEdge R440 (Intel Xeon Gold 6130, 2.10 GHz)|SPECrate2017_int_base=161|SPECrate2017_int_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00318.html|test_timestamp=2017-10-20 16:27:07-0400|chip_count=2|core_count=32|thread_count=32|vendor=HPE|system=Synergy 480 Gen10 (2.10 GHz, Intel Xeon Gold 6130)|SPECspeed2017_fp_base=104|SPECspeed2017_fp_peak=}}
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00321.html|test_timestamp=2017-10-18 12:32:14-0400|chip_count=2|core_count=32|copies_count=64|vendor=HPE|system=Synergy 480 Gen10 (2.10 GHz, Intel Xeon Gold 6130)|SPECrate2017_int_base=160|SPECrate2017_int_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00324.html|test_timestamp=2017-10-20 13:50:50-0400|chip_count=2|core_count=32|thread_count=32|vendor=HPE|system=Synergy 480 Gen10 (2.10 GHz, Intel Xeon Gold 6130)|SPECspeed2017_int_base=8.65|SPECspeed2017_int_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00365.html|test_timestamp=2017-10-13 16:58:02-0400|chip_count=2|core_count=32|copies_count=64|vendor=HPE|system=Synergy 480 Gen10 (2.10 GHz, Intel Xeon Gold 6130)|SPECrate2017_fp_base=162|SPECrate2017_fp_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00437.html|test_timestamp=2017-10-14 17:03:24-0400|chip_count=4|core_count=64|copies_count=128|vendor=HPE|system=ProLiant DL580 Gen10 (2.10 GHz, Intel Xeon Gold 6130)|SPECrate2017_fp_base=269|SPECrate2017_fp_peak=275}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00444.html|test_timestamp=2017-10-14 06:15:36-0400|chip_count=4|core_count=64|copies_count=128|vendor=HPE|system=ProLiant DL580 Gen10 (2.10 GHz, Intel Xeon Gold 6130)|SPECrate2017_int_base=299|SPECrate2017_int_peak=317}}
| |
− | }}
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| | | |
− | [[Category:microprocessor models by intel based on skylake extreme core count die]]
| + | {{unknown features}} |