From WikiChip
Editing intel/xeon e7
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Latest revision | Your text | ||
Line 28: | Line 28: | ||
| clock min = 1700 MHz | | clock min = 1700 MHz | ||
| clock max = 3400 MHZ | | clock max = 3400 MHZ | ||
− | | package = FCLGA- | + | | package = FCLGA-1567 |
| package 2 = | | package 2 = | ||
− | | socket = LGA-1567 | + | | socket = LGA-1567-1 |
| socket 2 = | | socket 2 = | ||
− | | succession = | + | | succession = <!-- yes for succession info --> |
| predecessor = | | predecessor = | ||
| predecessor link = | | predecessor link = | ||
− | | successor = | + | | successor = |
− | | successor link = | + | | successor link = |
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
}} | }} | ||
'''Xeon E7''' is a family of high-end enterprise-level [[x86]] microprocessors. These server processors offer the highest performance, most extensive set of features, and offer multi-socket configuration support. | '''Xeon E7''' is a family of high-end enterprise-level [[x86]] microprocessors. These server processors offer the highest performance, most extensive set of features, and offer multi-socket configuration support. | ||
== Members == | == Members == | ||
− | === Westmere EX === | + | === Westmere-EX === |
− | {{ | + | {{main|intel/microarchitectures/westmere|l1=Westmere µarch}} |
− | + | {{empty section}} | |
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
==== Die Shot ==== | ==== Die Shot ==== | ||
Line 93: | Line 52: | ||
* 10 cores | * 10 cores | ||
− | === Ivy Bridge EX (v2) === | + | === Ivy Bridge-EX (v2) === |
{{main|intel/microarchitectures/ivy bridge|l1=Ivy Bridge µarch}} | {{main|intel/microarchitectures/ivy bridge|l1=Ivy Bridge µarch}} | ||
{{empty section}} | {{empty section}} | ||
Line 103: | Line 62: | ||
* 15 cores | * 15 cores | ||
− | === Haswell EX (v3) === | + | === Haswell-EX (v3) === |
{{main|intel/microarchitectures/haswell|l1=Haswell µarch}} | {{main|intel/microarchitectures/haswell|l1=Haswell µarch}} | ||
{{empty section}} | {{empty section}} | ||
Line 113: | Line 72: | ||
* 18 cores | * 18 cores | ||
− | === Broadwell EX (v4) === | + | === Broadwell-EX (v4) === |
{{main|intel/microarchitectures/broadwell|l1=Broadwell µarch}} | {{main|intel/microarchitectures/broadwell|l1=Broadwell µarch}} | ||
{{empty section}} | {{empty section}} | ||
Line 119: | Line 78: | ||
== See Also == | == See Also == | ||
* {{intel|Xeon}} | * {{intel|Xeon}} | ||
− | |||
− | |||
* {{amd|Opteron}} | * {{amd|Opteron}} |
Facts about "Xeon E7 - Intel"
designer | Intel + |
first announced | April 5, 2011 + |
first launched | April 5, 2011 + |
full page name | intel/xeon e7 + |
instance of | microprocessor family + |
instruction set architecture | x86-64 + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | Westmere +, Ivy Bridge +, Haswell + and Broadwell + |
name | Intel Xeon E7 + |
package | FCLGA-8 + |
process | 32 nm (0.032 μm, 3.2e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | LGA-1567 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |