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{{intel title|Xeon E5-2699A v4}}
 
{{intel title|Xeon E5-2699A v4}}
−
{{chip
+
{{mpu
−
|name=Xeon E5-2699A v4
+
| name               = Xeon E5-2699A v4
−
|no image=Yes
+
| no image           = Yes
−
|designer=Intel
+
| image              =
−
|manufacturer=Intel
+
| image size          =
−
|model number=E5-2699A v4
+
| caption            =
−
|part number=CM8066003197800
+
| designer           = Intel
−
|s-spec=SR30Y
+
| manufacturer       = Intel
−
|s-spec qs=QLPM
+
| model number       = E5-2699A v4
−
|market=Server
+
| part number         = CM8066003197800
−
|first announced=October 25, 2016
+
| part number 1      =
−
|first launched=October 25, 2016
+
| part number 2      =  
−
|release price=$4938
+
| part number 3      =  
−
|family=Xeon E5
+
| market             = Server
−
|series=E5-2000
+
| first announced     = June 20, 2016
−
|locked=Yes
+
| first launched     = June 20, 2016
−
|frequency=2,400 MHz
+
| last order          =  
−
|turbo frequency1=3,600 MHz
+
| last shipment      =  
−
|turbo frequency2=3,600 MHz
+
| release price      = $4938
−
|turbo frequency3=3,400 MHz
 
−
|turbo frequency4=3,300 MHz
 
−
|turbo frequency5=3,200 MHz
 
−
|turbo frequency6=3,100 MHz
 
−
|turbo frequency7=3,000 MHz
 
−
|turbo frequency8=3,000 MHz
 
−
|turbo frequency9=3,000 MHz
 
−
|turbo frequency10=3,000 MHz
 
−
|turbo frequency11=3,000 MHz
 
−
|turbo frequency12=3,000 MHz
 
−
|turbo frequency13=3,000 MHz
 
−
|turbo frequency14=3,000 MHz
 
−
|turbo frequency15=3,000 MHz
 
−
|turbo frequency16=3,000 MHz
 
−
|turbo frequency17=3,000 MHz
 
−
|turbo frequency18=3,000 MHz
 
−
|turbo frequency19=3,000 MHz
 
−
|turbo frequency20=3,000 MHz
 
−
|turbo frequency21=3,000 MHz
 
−
|turbo frequency22=3,000 MHz
 
−
|turbo frequency=Yes
 
−
|bus type=QPI
 
−
|bus speed=4,800 MHz
 
−
|bus links=2
 
−
|bus rate=9.6 GT/s
 
−
|clock multiplier=24
 
−
|cpuid=406F1
 
−
|microarch=Broadwell
 
−
|platform=Grantley EP 2S
 
−
|chipset=C610 Series
 
−
|core name=Broadwell EP
 
−
|core family=6
 
−
|core model=4F
 
−
|core stepping=B0
 
−
|process=14 nm
 
−
|transistors=7,200,000,000
 
−
|technology=CMOS
 
−
|word size=64 bit
 
−
|core count=22
 
−
|thread count=44
 
−
|max memory=1,536 GiB
 
−
|max cpus=2
 
−
|v core=1.82 V
 
−
|v io=1.2 V
 
−
|v io tolerance=3%
 
−
|tdp=145 W
 
−
|tcase min=0 °C
 
−
|tcase max=? °C
 
−
|tstorage min=-25 °C
 
−
|tstorage max=125 °C
 
−
|die size=456.12 mm²
 
−
|packaging=Yes
 
−
|package 0=FCLGA-2011-v3
 
−
|package 0 type=FCLGA
 
−
|package 0 pins=2011
 
−
|package 0 pitch=0.8814 mm
 
−
|package 0 width=52.5 mm
 
−
|package 0 length=45.0 mm
 
−
|package 0 height=5.316 mm
 
−
|socket 0=LGA-2011-v3
 
−
|socket 0 type=LGA
 
−
}}
 
−
The '''Xeon E5-2699A v4''' is a {{arch|64}} [[docosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-optimized 2S environments (2U Square form factors). Operating at 2.4 GHz with a {{intel|turbo boost}} frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).
 
  
−
== Cache ==
+
| family              = Xeon E5
−
{{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}}
+
| series              = E5-2000
−
{{cache info
+
| locked              = Yes
−
|l1i cache=704 KiB
+
| frequency          = 2,400 MHz
−
|l1i break=22x32 KiB
+
| turbo frequency    = Yes
−
|l1i desc=8-way set associative
+
| turbo frequency1    = 3,600 MHz
−
|l1i extra=(per core, write-back)
+
| turbo frequency2    =  
−
|l1d cache=704 KiB
+
| bus type            = QPI
−
|l1d break=22x32 KiB
+
| bus speed          = 4,800 MHz
−
|l1d desc=8-way set associative
+
| bus rate            = 9.6 GT/s
−
|l1d extra=(per core, write-back)
+
| bus links          = 2
−
|l2 cache=5.5 MiB
+
| clock multiplier    = 24
−
|l2 break=22x256 KiB
+
| s-spec              = SSR30Y
−
|l2 desc=8-way set associative
+
| s-spec es          =  
−
|l2 extra=(per core, write-back)
+
| s-spec qs          =  
−
|l3 cache=55 MiB
+
| cpuid              = 406F1
−
|l3 break=22x2.5 MiB
 
−
|l3 desc=20-way set associative
 
−
|l3 extra=(shared, per core, write-back)
 
−
}}
 
  
−
== Graphics ==
+
| microarch          = Broadwell
−
This microprocessor has no [[integrated graphics processing unit]].
+
| platform            = Grantley EP 2S
 +
| chipset            = C610 Series
 +
| core name          = Broadwell EP
 +
| core family        = 6
 +
| core model          = 15
 +
| core stepping      = B0
 +
| process            = 14 nm
 +
| transistors        = 7,200,000,000
 +
| technology          = CMOS
 +
| die size            = 456.12 mm²
 +
| word size          = 64 bit
 +
| core count          = 22
 +
| thread count        = 44
 +
| max cpus            = 2
 +
| max memory          = 1,536 GiB
  
−
== Memory controller ==
+
| electrical          = Yes
−
{{integrated memory controller
+
| v core              = 1.82 V
−
| type              = DDR4-2400
+
| v core tolerance    =  
−
| controllers        = 1
+
| v io                = 1.2 V
−
| channels           = 4
+
| v io tolerance      = 3%
−
| ecc support        = Yes
+
| sdp                =  
−
| max bandwidth      = 71.53 GiB/s
+
| tdp                = 145 W
−
| bandwidth schan    = 17.88 GiB/s
+
| ctdp down           =  
−
| bandwidth dchan    = 35.76 GiB/s
+
| ctdp down frequency =
−
| max memory        = 1,536 GiB
+
| ctdp up            =
−
| pae                = 46 bit
+
| ctdp up frequency  =  
−
}}
+
| tjunc min          =  
 +
| tjunc max          =  
 +
| tcase min          = 0 °C
 +
| tcase max           = ? °C
 +
| tstorage min        = -25 °C
 +
| tstorage max        = 125 °C
  
−
== Expansions ==
+
| packaging          = Yes
−
{{expansions
+
| package 0          = FCLGA-2011-v3
−
| pcie revision      = 3.0
+
| package 0 type      = FCLGA
−
| pcie lanes        = 40
+
| package 0 pins      = 2011
−
| pcie config        = x4
+
| package 0 pitch    = 0.8814 mm
−
| pcie config 1      = x8
+
| package 0 width    = 52.5 mm
−
| pcie config 2      = x16
+
| package 0 length    = 45.0 mm
−
}}
+
| package 0 height    = 5.316 mm
−
 
+
| socket 0            = LGA-2011-v3
−
== Features ==
+
| socket 0 type       = LGA
−
{{x86 features
 
−
|real=Yes
 
−
|protected=Yes
 
−
|smm=No
 
−
|fpu=No
 
−
|x8616=No
 
−
|x8632=No
 
−
|x8664=Yes
 
−
|nx=Yes
 
−
|mmx=Yes
 
−
|emmx=No
 
−
|sse=Yes
 
−
|sse2=Yes
 
−
|sse3=Yes
 
−
|ssse3=Yes
 
−
|sse41=Yes
 
−
|sse42=No
 
−
|sse4a=No
 
−
|sse_gfni=No
 
−
|avx=Yes
 
−
|avx_gfni=No
 
−
|avx2=Yes
 
−
|avx512f=No
 
−
|avx512cd=No
 
−
|avx512er=No
 
−
|avx512pf=No
 
−
|avx512bw=No
 
−
|avx512dq=No
 
−
|avx512vl=No
 
−
|avx512ifma=No
 
−
|avx512vbmi=No
 
−
|avx5124fmaps=No
 
−
|avx512vnni=No
 
−
|avx5124vnniw=No
 
−
|avx512vpopcntdq=No
 
−
|avx512gfni=No
 
−
|avx512vaes=No
 
−
|avx512vbmi2=No
 
−
|avx512bitalg=No
 
−
|avx512vpclmulqdq=No
 
−
|abm=No
 
−
|tbm=No
 
−
|bmi1=Yes
 
−
|bmi2=Yes
 
−
|fma3=Yes
 
−
|fma4=No
 
−
|aes=Yes
 
−
|rdrand=No
 
−
|sha=No
 
−
|xop=No
 
−
|adx=No
 
−
|clmul=No
 
−
|f16c=Yes
 
−
|bfloat16=No
 
−
|tbt1=Yes
 
−
|tbt2=Yes
 
−
|tbmt3=Yes
 
−
|tvb=No
 
−
|bpt=No
 
−
|eist=Yes
 
−
|sst=No
 
−
|flex=No
 
−
|fastmem=No
 
−
|ivmd=No
 
−
|intelnodecontroller=No
 
−
|intelnode=No
 
−
|kpt=No
 
−
|tme=No
 
−
|mktme=No
 
−
|ptt=No
 
−
|intelrunsure=No
 
−
|mbe=No
 
−
|isrt=No
 
−
|sba=No
 
−
|mwt=No
 
−
|sipp=No
 
−
|att=Yes
 
−
|ipt=No
 
−
|tsx=Yes
 
−
|txt=Yes
 
−
|ht=Yes
 
−
|vpro=Yes
 
−
|vtx=No
 
−
|vtd=No
 
−
|ept=Yes
 
−
|mpx=No
 
−
|sgx=No
 
−
|securekey=No
 
−
|osguard=No
 
−
|intqat=No
 
−
|dlboost=No
 
−
|3dnow=No
 
−
|e3dnow=No
 
−
|smartmp=No
 
−
|powernow=No
 
−
|amdvi=No
 
−
|amdv=No
 
−
|amdsme=No
 
−
|amdtsme=No
 
−
|amdsev=No
 
−
|rvi=No
 
−
|smt=No
 
−
|sensemi=No
 
−
|xfr=No
 
−
|xfr2=No
 
−
|mxfr=No
 
−
|amdpb=No
 
−
|amdpb2=No
 
−
|amdpbod=No
 
−
|em64t=Yes
 
−
|vt-x=Yes
 
−
|vt-d=Yes
 
−
|sse4_1=Yes
 
−
|sse4_2=Yes
 
−
|pclmul=Yes
 
−
|bmi=Yes
 
−
|secure key=Yes
 
−
|os guard=Yes
 
−
}}
 
−
 
 
−
== Benchmarks ==
 
−
{{benchmarks main
 
−
|
 
−
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00013.html|test_timestamp=2016-12-10 10:49:26-0500|chip_count=2|core_count=44|copies_count=88|vendor=Fujitsu|system=PRIMERGY RX2560 M2, Intel Xeon E5-2699A v4, 2.40GHz|SPECrate2017_fp_base=149|SPECrate2017_fp_peak=}}
 
−
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00014.html|test_timestamp=2016-12-11 03:26:03-0500|chip_count=2|core_count=44|copies_count=88|vendor=Fujitsu|system=PRIMERGY RX2560 M2, Intel Xeon E5-2699A v4, 2.40GHz|SPECrate2017_int_base=164|SPECrate2017_int_peak=}}
 
−
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00021.html|test_timestamp=2016-12-07 11:54:06-0500|chip_count=2|core_count=44|copies_count=88|vendor=HPE|system=ProLiant DL360 Gen9 (2.40 GHz, Intel Xeon E5-2699A v4)|SPECrate2017_fp_base=149|SPECrate2017_fp_peak=149}}
 
−
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00022.html|test_timestamp=2016-12-09 13:58:28-0500|chip_count=2|core_count=44|copies_count=88|vendor=HPE|system=ProLiant DL380 Gen9 (2.40 GHz, Intel Xeon E5-2699A v4)|SPECrate2017_fp_base=147|SPECrate2017_fp_peak=148}}
 
−
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q3/cpu2017-20170828-00068.html|test_timestamp=2017-08-22 07:20:59-0400|chip_count=2|core_count=44|copies_count=88|vendor=Supermicro|system=SuperServer 2028U-TR4T+ (X10DRU-i+, Intel Xeon E5-2699A v4)|SPECrate2017_int_base=162|SPECrate2017_int_peak=173}}
 
−
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q3/cpu2017-20170828-00069.html|test_timestamp=2017-08-22 20:56:45-0400|chip_count=2|core_count=44|copies_count=88|vendor=Supermicro|system=SuperServer 2028U-TR4T+ (X10DRU-i+, Intel Xeon E5-2699A v4)|SPECrate2017_fp_base=149|SPECrate2017_fp_peak=149}}
 
 
}}
 
}}
 +
The '''Xeon E5-2699A v4''' is a {{arch|64}} [[docosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-optimized 2S environments (2U Square form factors). Operating at 2.4 GHz with a {{intel|turbo boost}} frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).

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Retrieved from "https://en.wikichip.org/wiki/intel/xeon_e5/e5-2699a_v4"
Facts about "Xeon E5-2699A v4 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel + and Xeon E5-2699A v4 - Intel#io +
base frequency2,400 MHz (2.4 GHz, 2,400,000 kHz) +
bus links2 +
bus rate9,600 MT/s (9.6 GT/s, 9,600,000 kT/s) +
bus speed4,800 MHz (4.8 GHz, 4,800,000 kHz) +
bus typeQPI +
chipsetC610 Series +
clock multiplier24 +
core count22 +
core family6 +
core model4F +
core nameBroadwell EP +
core steppingB0 +
core voltage1.82 V (18.2 dV, 182 cV, 1,820 mV) +
cpuid406F1 +
designerIntel +
die area456.12 mm² (0.707 in², 4.561 cm², 456,120,000 µm²) +
familyXeon E5 +
first announcedOctober 25, 2016 +
first launchedOctober 25, 2016 +
full page nameintel/xeon e5/e5-2699a v4 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has extended page tables supporttrue +
has featureTrusted Execution Technology +, Transactional Synchronization Extensions +, Intel vPro Technology +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Extended Page Tables +, Turbo Boost Technology 1.0 + and Turbo Boost Max Technology 3.0 +
has intel enhanced speedstep technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost max technology 3 0true +
has intel turbo boost technology 1 0true +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
io voltage1.2 V (12 dV, 120 cV, 1,200 mV) +
io voltage tolerance3% +
l1d$ description8-way set associative +
l1d$ size704 KiB (720,896 B, 0.688 MiB) +
l1i$ description8-way set associative +
l1i$ size704 KiB (720,896 B, 0.688 MiB) +
l2$ description8-way set associative +
l2$ size5.5 MiB (5,632 KiB, 5,767,168 B, 0.00537 GiB) +
l3$ description20-way set associative +
l3$ size55 MiB (56,320 KiB, 57,671,680 B, 0.0537 GiB) +
ldateOctober 25, 2016 +
manufacturerIntel +
market segmentServer +
max cpu count2 +
max memory1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) +
max pcie lanes40 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureBroadwell +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberE5-2699A v4 +
nameXeon E5-2699A v4 +
part numberCM8066003197800 +
platformGrantley EP 2S +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 4,938.00 (€ 4,444.20, £ 3,999.78, ¥ 510,243.54) +
s-specSR30Y +
s-spec (qs)QLPM +
seriesE5-2000 +
smp max ways2 +
tdp145 W (145,000 mW, 0.194 hp, 0.145 kW) +
technologyCMOS +
thread count44 +
transistor count7,200,000,000 +
turbo frequency (10 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (11 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (12 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (13 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (14 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (15 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (16 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (17 cores)3,000 MHz +
turbo frequency (18 cores)3,000 MHz +
turbo frequency (19 cores)3,000 MHz +
turbo frequency (1 core)3,600 MHz (3.6 GHz, 3,600,000 kHz) +
turbo frequency (20 cores)3,000 MHz +
turbo frequency (21 cores)3,000 MHz +
turbo frequency (22 cores)3,000 MHz +
turbo frequency (2 cores)3,600 MHz (3.6 GHz, 3,600,000 kHz) +
turbo frequency (3 cores)3,400 MHz (3.4 GHz, 3,400,000 kHz) +
turbo frequency (4 cores)3,300 MHz (3.3 GHz, 3,300,000 kHz) +
turbo frequency (5 cores)3,200 MHz (3.2 GHz, 3,200,000 kHz) +
turbo frequency (6 cores)3,100 MHz (3.1 GHz, 3,100,000 kHz) +
turbo frequency (7 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (8 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (9 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +