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{{intel title|Xeon E3-1284L v3}} | {{intel title|Xeon E3-1284L v3}} | ||
− | {{ | + | {{mpu |
| name = Intel Xeon E3-1284L v3 | | name = Intel Xeon E3-1284L v3 | ||
| image = | | image = | ||
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| locked = Yes | | locked = Yes | ||
| frequency = 1800 MHz | | frequency = 1800 MHz | ||
− | + | | turbo frequency = yes | |
| turbo frequency1 = 3200 MHz | | turbo frequency1 = 3200 MHz | ||
| turbo frequency2 = 3100 MHz | | turbo frequency2 = 3100 MHz | ||
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| thread count = 8 | | thread count = 8 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 32 | + | | max memory = 32 GB |
− | |||
+ | | electrical = Yes | ||
| tdp = 47 W | | tdp = 47 W | ||
| temp max = 100 C | | temp max = 100 C | ||
− | |package | + | | packaging = Yes |
+ | | package = FCBGA1364 | ||
+ | | package type = FCBGA | ||
+ | | package pitch = | ||
+ | | package size = 37.5mm x 32mm x 1.65mm | ||
+ | | socket = BGA1364 | ||
+ | | socket type = BGA | ||
}} | }} | ||
The '''Intel Xeon E3-1284L v3''' is a [[quad core]] [[64-bit architecture|64-bit]] server [[microprocessor]] released by [[Intel]] in 2014. The microprocessor is based on the [[Haswell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features the 128 MB [[L4$]] {{intel|Crystal Well}} cache. | The '''Intel Xeon E3-1284L v3''' is a [[quad core]] [[64-bit architecture|64-bit]] server [[microprocessor]] released by [[Intel]] in 2014. The microprocessor is based on the [[Haswell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features the 128 MB [[L4$]] {{intel|Crystal Well}} cache. | ||
== Cache == | == Cache == | ||
− | |||
This specific microprocessor includes the [[has feature::Crystal Well]] cache. | This specific microprocessor includes the [[has feature::Crystal Well]] cache. | ||
{{cache info | {{cache info | ||
− | |l1i cache=128 | + | |l1i cache=128 KB |
− | |l1i break=4x32 | + | |l1i break=4x32 KB |
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
|l1i extra=(per core, write-back) | |l1i extra=(per core, write-back) | ||
− | |l1d cache=128 | + | |l1d cache=128 KB |
− | |l1d break=4x32 | + | |l1d break=4x32 KB |
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
|l1d extra=(per core, write-back) | |l1d extra=(per core, write-back) | ||
− | |l2 cache=1 | + | |l2 cache=1 MB |
− | |l2 break=4x256 | + | |l2 break=4x256 KB |
|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
|l2 extra=(per core, write-back) | |l2 extra=(per core, write-back) | ||
|l3 cache=6 MiB | |l3 cache=6 MiB | ||
− | |l3 desc= | + | |l3 desc=shared |
− | |||
|l4 cache=128 MiB | |l4 cache=128 MiB | ||
|l4 desc=16-way set associative | |l4 desc=16-way set associative | ||
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| frequency = 200 MHz | | frequency = 200 MHz | ||
| max frequency = 750 MHz | | max frequency = 750 MHz | ||
− | | max memory = | + | | max memory = 1000 MB |
| output edp = Yes | | output edp = Yes | ||
| output dp = Yes | | output dp = Yes | ||
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== Features == | == Features == | ||
− | {{ | + | {{mpu features |
| em64t = Yes | | em64t = Yes | ||
| nx = Yes | | nx = Yes |
Facts about "Xeon E3-1284L v3 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E3-1284L v3 - Intel#package + |
base frequency | 1,800 MHz (1.8 GHz, 1,800,000 kHz) + |
bus rate | 5,000 MT/s (5 GT/s, 5,000,000 kT/s) + |
bus type | DMI 2.0 + |
clock multiplier | 18 + |
core count | 4 + |
core stepping | C0 + |
designer | Intel + |
family | Xeon E3 + |
first announced | March 1, 2014 + |
first launched | October 1, 2014 + |
full page name | intel/xeon e3/e3-1284l v3 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has feature | Crystal Well +, integrated gpu +, Trusted Execution Technology +, Transactional Synchronization Extensions +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and Enhanced SpeedStep Technology + |
has intel enhanced speedstep technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has locked clock multiplier | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | Intel Iris Pro Graphics 5200 + |
integrated gpu base frequency | 200 MHz (0.2 GHz, 200,000 KHz) + |
integrated gpu max frequency | 750 MHz (0.75 GHz, 750,000 KHz) + |
integrated gpu max memory | 1,024 MiB (1,048,576 KiB, 1,073,741,824 B, 1 GiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | 12-way set associative + |
l3$ size | 6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) + |
l4$ description | 16-way set associative + |
l4$ size | 128 MiB (131,072 KiB, 134,217,728 B, 0.125 GiB) + |
ldate | October 1, 2014 + |
manufacturer | Intel + |
market segment | Server + |
max cpu count | 1 + |
max memory | 32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) + |
max operating temperature | 100 C + |
microarchitecture | Haswell + |
model number | E3-1284L v3 + |
name | Intel Xeon E3-1284L v3 + |
package | FCBGA-1364 + |
part number | CL8064701637600 + |
process | 22 nm (0.022 μm, 2.2e-5 mm) + |
s-spec | SR1U0 + |
smp max ways | 1 + |
tdp | 47 W (47,000 mW, 0.063 hp, 0.047 kW) + |
thread count | 8 + |
turbo frequency (1 core) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (2 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (3 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (4 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |