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{{intel|Coffee Lake|l=arch}}-based Xeon Es were introduced in early 2018. This was the first series of processors that are part of the Xeon E series and effectively superceed the previous {{intel|Xeon E3|Xeon E3 v6}} series based on {{intel|Kaby Lake DT|l=core}}. This series brought parts with up to 50% more cores (up to [[6 cores|6]] from [[4 cores|4]]) and some of the fastest clocks. It's worth noting that although they still use standard {{intel|LGA-1151|Socket LGA-1151}}, those parts are no longer backwards compatible with earlier 100/200-series [[chipsets]] and must be paired with an appropriate {{intel|cannon point|300-series chipset}}. All models have the following features in common: | {{intel|Coffee Lake|l=arch}}-based Xeon Es were introduced in early 2018. This was the first series of processors that are part of the Xeon E series and effectively superceed the previous {{intel|Xeon E3|Xeon E3 v6}} series based on {{intel|Kaby Lake DT|l=core}}. This series brought parts with up to 50% more cores (up to [[6 cores|6]] from [[4 cores|4]]) and some of the fastest clocks. It's worth noting that although they still use standard {{intel|LGA-1151|Socket LGA-1151}}, those parts are no longer backwards compatible with earlier 100/200-series [[chipsets]] and must be paired with an appropriate {{intel|cannon point|300-series chipset}}. All models have the following features in common: | ||
− | + | * '''Mem:''' Up to 64 [[GiB]] of 2666 MT/s [[DDR4]] | |
− | * '''Mem:''' Up to | + | * '''I/O:''' PCIe Gen 3.0 x16 lanes |
− | * '''I/O:''' | ||
* '''TDP:''' 65-95 W | * '''TDP:''' 65-95 W | ||
* '''ISA:''' Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2) | * '''ISA:''' Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2) | ||
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<table class="comptable sortable tc4 tc5 tc6 tc7 tc8 tc9 tc13"> | <table class="comptable sortable tc4 tc5 tc6 tc7 tc8 tc9 tc13"> | ||
{{comp table header|main|12:List of Coffee Lake E-based Xeon E Processors}} | {{comp table header|main|12:List of Coffee Lake E-based Xeon E Processors}} | ||
− | {{comp table header|main|8:Main processor|3:Integrated Graphics}} | + | {{comp table header|main|8:Main processor|3:Integrated Graphics|1:Features}} |
− | {{comp table header|cols|Launched|Price|Cores|Threads|L3$|%TDP|%Frequency|%Turbo|Name|%Frequency|%Turbo}} | + | {{comp table header|cols|Launched|Price|Cores|Threads|L3$|%TDP|%Frequency|%Turbo|Name|%Frequency|%Turbo|{{intel|Hyper-threading|HT}}}} |
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Coffee Lake]] [[core name::Coffee Lake E]] | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Coffee Lake]] [[core name::Coffee Lake E]] | ||
|?full page name | |?full page name | ||
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|?integrated gpu base frequency | |?integrated gpu base frequency | ||
|?integrated gpu max frequency | |?integrated gpu max frequency | ||
+ | |?has simultaneous multithreading | ||
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=14:14 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
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{{intel|Coffee Lake|l=arch}}-based Xeon Es were introduced in early 2018. All models have the following features in common: | {{intel|Coffee Lake|l=arch}}-based Xeon Es were introduced in early 2018. All models have the following features in common: | ||
− | * ''' | + | * '''CPU:''' [[hexa-core]] with {{intel|Hyper-Threading}}, 12 MiB L3 |
− | * '''Mem:''' Up to | + | * '''Mem:''' Up to 64 [[GiB]] of 2666 MT/s [[DDR4]] |
* '''I/O:''' PCIe Gen 3.0 x16 lanes | * '''I/O:''' PCIe Gen 3.0 x16 lanes | ||
* '''TDP:''' 45 W | * '''TDP:''' 45 W | ||
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{{comp table header|main|8:Main processor|3:Integrated Graphics}} | {{comp table header|main|8:Main processor|3:Integrated Graphics}} | ||
{{comp table header|cols|Launched|Price|Cores|Threads|L3$|%TDP|%Frequency|%Turbo|Name|%Frequency|%Turbo}} | {{comp table header|cols|Launched|Price|Cores|Threads|L3$|%TDP|%Frequency|%Turbo|Name|%Frequency|%Turbo}} | ||
− | {{#ask: [[Category:microprocessor models by intel]] [[ | + | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Coffee Lake]] [[family::Xeon E]][[market segment::Mobile]] |
|?full page name | |?full page name | ||
|?model number | |?model number | ||
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|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
− | {{comp table count|ask=[[Category:microprocessor models by intel]] [[ | + | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Coffee Lake]] [[family::Xeon E]][[market segment::Mobile]]}} |
</table> | </table> | ||
{{comp table end}} | {{comp table end}} | ||
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==== Desktop ==== | ==== Desktop ==== | ||
{{see also|intel/cores/coffee lake er|l1=Coffee Lake ER}} | {{see also|intel/cores/coffee lake er|l1=Coffee Lake ER}} | ||
− | {{intel|Coffee Lake|l=arch}} refresh-based Xeon Es | + | {{intel|Coffee Lake|l=arch}} refresh-based Xeon Es are expected to be introduced in early 2019. Those processors are identical to the prior generation but offer higher frequencies at the same price points. Addition, alog with refreshed parts, Intel also introduced [[eight-core]] parts. All models have the following features in common: |
− | + | ||
− | * '''Mem:''' Up to | + | {{future information}} |
− | * '''I/O:''' | + | |
− | * '''TDP:''' | + | |
+ | * '''Mem:''' Up to 64 [[GiB]] of 2666 MT/s [[DDR4]] | ||
+ | * '''I/O:''' PCIe Gen 3.0 x16 lanes | ||
+ | * '''TDP:''' 65-95 W | ||
* '''ISA:''' Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2) | * '''ISA:''' Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2) | ||
* '''Tech:''' {{intel|Turbo Boost}}, {{intel|VT-x}}, {{intel|VT-d}}, {{intel|EPT}}, {{intel|SpeedStep}} (EIST), {{intel|TXT}}, {{intel|TSX}}, {{intel|vPro}}, Software Guard ({{intel|SGX}}), {{intel|Secure Key}}, Memory Protection ({{intel|MPX}}), and {{intel|OS Guard}} | * '''Tech:''' {{intel|Turbo Boost}}, {{intel|VT-x}}, {{intel|VT-d}}, {{intel|EPT}}, {{intel|SpeedStep}} (EIST), {{intel|TXT}}, {{intel|TSX}}, {{intel|vPro}}, Software Guard ({{intel|SGX}}), {{intel|Secure Key}}, Memory Protection ({{intel|MPX}}), and {{intel|OS Guard}} | ||
− | * '''GPU:''' {{intel|UHD Graphics P630}} @ 350 MHz with bursts of 1.2 GHz, ''non-G'' parts do not have a GPU | + | * '''GPU:''' {{intel|UHD Graphics P630}} @ 350 MHz with bursts of 1.15-1.2 GHz, ''non-G'' parts do not have a GPU |
<!-- NOTE: | <!-- NOTE: | ||
This table is generated automatically from the data in the actual articles. | This table is generated automatically from the data in the actual articles. | ||
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{{comp table start}} | {{comp table start}} | ||
<table class="comptable sortable tc4 tc5 tc6 tc7 tc8 tc9 tc13"> | <table class="comptable sortable tc4 tc5 tc6 tc7 tc8 tc9 tc13"> | ||
− | {{comp table header|main|12:List of Coffee Lake | + | {{comp table header|main|12:List of Coffee Lake ER-based Xeon E Processors}} |
− | {{comp table header|main|8:Main processor|3:Integrated Graphics}} | + | {{comp table header|main|8:Main processor|3:Integrated Graphics|1:Features}} |
− | {{comp table header|cols|Launched|Price|Cores|Threads|L3$|%TDP|%Frequency|%Turbo|Name|%Frequency|%Turbo}} | + | {{comp table header|cols|Launched|Price|Cores|Threads|L3$|%TDP|%Frequency|%Turbo|Name|%Frequency|%Turbo|{{intel|Hyper-threading|HT}}}} |
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Coffee Lake]] [[core name::Coffee Lake ER]] | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Coffee Lake]] [[core name::Coffee Lake ER]] | ||
|?full page name | |?full page name | ||
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|?integrated gpu base frequency | |?integrated gpu base frequency | ||
|?integrated gpu max frequency | |?integrated gpu max frequency | ||
+ | |?has simultaneous multithreading | ||
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=14:14 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Coffee Lake]] [[core name::Coffee Lake ER]]}} | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Coffee Lake]] [[core name::Coffee Lake ER]]}} | ||
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Facts about "Xeon E - Intel"
designer | Intel + |
first announced | 2018 + |
first launched | 2018 + |
full page name | intel/xeon e + |
instance of | microprocessor family + |
instruction set architecture | x86-64 + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | Coffee Lake + |
name | Xeon E + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |