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| phase-out        = August, 2011
 
| phase-out        = August, 2011
 
| process          = 32 nm
 
| process          = 32 nm
|isa=x86-64
+
 
 
| succession      = Yes
 
| succession      = Yes
 
| predecessor      = Nehalem
 
| predecessor      = Nehalem
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{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
! Core !! Platform !! Cores(Threads) !! [[IGP]] !! Description
+
! Core !! Platform !! C/T !! [[IGP]] !! Description
|-
 
| {{intel|Gulftown|l=core}} || {{intel|X58 Platform}} || [[6 cores|6]](12) || {{tchk|no}} || High-end desktops & enthusiasts market
 
|-
 
| {{intel|Clarkdale|l=core}} || {{intel|Calpella}} || [[2 cores|2]](4) || {{tchk|yes}} || Mainstream desktop performance processors
 
 
|-
 
|-
| {{intel|Arrandale|l=core}} || {{intel|Calpella}} || [[2 cores|2]](4) || {{tchk|yes}} || Mainstream mobile performance processors
+
| {{intel|Gulftown|l=core}} || {{intel|X58 Platform}} || 6C/12T || || High-end desktops & enthusiasts market
 
|-
 
|-
| {{intel|Westmere EP|l=core}} || || [[4 cores|4]](4) - [[6 cores|6]](12) || {{tchk|no}} || Low-end server processors
+
| {{intel|Clarkdale|l=core}} || {{intel|Calpella}} || 2C/4T || || Mainstream desktop performance processors
 
|-
 
|-
| {{intel|Westmere EX|l=core}} || || [[6 cores|6]](12) - [[10 cores|10]](12) || {{tchk|no}} || High-end server processors
+
| {{intel|Arrandale|l=core}} || {{intel|Calpella}} || 2C/4T || || Mainstream mobile performance processors
|}
 
 
 
== Brands ==
 
 
 
{| class="wikitable tc4 tc5 tc6 tc7" style="text-align: center;"
 
|-
 
! rowspan="2" | Logo !! rowspan="2" | Family !! rowspan="2" | General Description !! colspan="6" | Differentiating Features
 
|-
 
! Cores !! {{intel|Hyper-Threading|HT}} !! [[IGP]] !! {{intel|Turbo Boost|TBT}} !! [[ECC]]
 
|-
 
| [[File:intel celeron (2009).png|60px|link=intel/celeron]] || {{intel|Celeron}} || style="text-align: left;" | Entry-level Budget || [[2 cores|2]] || {{tchk|no}} || {{tchk|yes}} || {{tchk|no}} || {{tchk|some}}
 
|-
 
| [[File:intel pentium (2009).png|60px|link=intel/pentium_(2009)]] || {{intel|Pentium (2009)|Pentium}} || style="text-align: left;" | Budget || [[2 cores|2]] || {{tchk|no}} || {{tchk|yes}} || {{tchk|no}} ||  {{tchk|some}}
 
|-
 
| [[File:core i3 logo (2009).png|60px|link=intel/core_i3]] || {{intel|Core i3}} || style="text-align: left;" | Low-end Performance || [[2 cores|2]] || {{tchk|yes}} || {{tchk|yes}} || {{tchk|no}} ||  {{tchk|some}} 
 
|-
 
| [[File:core i5 logo (2009).png|60px|link=intel/core_i5]] || {{intel|Core i5}} || style="text-align: left;" | Mid-range Performance || [[2 cores|2]] || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|some}}
 
|-
 
| rowspan="2" | [[File:core i7 logo (2009).png|60px|link=intel/core_i7]] || rowspan="2" | {{intel|Core i7}} || style="text-align: left;" | High-end Performance (Mobile) || [[2 cores|2]] || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} ||  {{tchk|some}}
 
|-
 
| style="text-align: left;" | High-end Performance (Desktop) ||  [[6 cores|6]] || {{tchk|yes}} || {{tchk|no}} || {{tchk|yes}} || {{tchk|no}}
 
|-
 
| [[File:core i7ee logo (2009).png|60px|link=intel/core i7 ee]] || {{intel|Core i7EE}} || style="text-align: left;" | Enthusiasts/High-end Performance || [[6 cores|6]] || {{tchk|yes}} || {{tchk|no}} || {{tchk|yes}} ||  {{tchk|no}}
 
|-
 
| [[File:xeon logo (2009).png|60px|link=intel/xeon e7]] ||  {{intel|Xeon E7}} || style="text-align: left;" | High-end server || [[6 cores|6]] - [[10 cores|10]] || {{tchk|yes}} || {{tchk|no}} || {{tchk|some}} || {{tchk|yes}}
 
 
|}
 
|}
  
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{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
! !! Nehalem !! Westmere !! Δ !! rowspan="7" | [[File:intel 32nm gate.png|250px]]
+
! !! Nehalem !! Westmere !!  
 
|-
 
|-
 
| || [[45 nm]] || [[32 nm]] ||
 
| || [[45 nm]] || [[32 nm]] ||
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== Architecture==  
 
== Architecture==  
=== Key changes from {{\\|Nehalem}} ===
 
 
{{empty section}}
 
{{empty section}}
 
==== New instructions ====
 
Westmere introduced a number of {{x86|extensions|new instructions}}:
 
 
* {{x86|CLMUL|<code>CLMUL</code>}} - [[Hardware-accelerated]] Carry-less Multiplication
 
* {{x86|AES|<code>AES</code>}} - [[Hardware-accelerated]] AES operations
 
  
 
== Die ==  
 
== Die ==  
 +
===Server die===
  
===Dual-Core Westmere die ===
+
====Deca-Core Westmere die ====
* 81 mm²
 
* 384,000,000 transistors
 
* [[32 nm process]]
 
* 2 cores
 
[[File:intel westmere die shot.jpeg|350px]]
 
 
 
===Hexa-Core Westmere die ===
 
* 240 mm²
 
* 1,170,000,000 transistors
 
* [[32 nm process]]
 
* 6 cores
 
[[File:Westmere-EP-Die.jpeg|700px]]
 
 
 
===Deca-Core Westmere die ===
 
 
* 513 mm²
 
* 513 mm²
 
* 2,600,000,000 transistors
 
* 2,600,000,000 transistors
 
* [[32 nm process]]
 
* [[32 nm process]]
 
* 10 cores
 
* 10 cores
[[File:intel xeon e7 die shot.jpg|700px]]
+
[[File:intel xeon e7 die shot.jpg|850px]]
  
 
== All Westmere Chips ==
 
== All Westmere Chips ==
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</table>
 
</table>
 
{{comp table end}}
 
{{comp table end}}
 
== Documents ==
 
* [[:File:embedded core platform (arrandale).pdf|Intel® Core i7, Intel® Core i5 and Intel® Core i3 Processor-based Platforms for Embedded Computing, Platform brief]]
 

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codenameWestmere +
designerIntel +
first launchedJanuary 2010 +
full page nameintel/microarchitectures/westmere (client) +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameWestmere +
phase-outAugust 2011 +
process32 nm (0.032 μm, 3.2e-5 mm) +