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|extension 23=SHA | |extension 23=SHA | ||
|core name=Elkhart Lake | |core name=Elkhart Lake | ||
− | |core name 2 | + | |core name 2=Skyhawk Lake |
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|predecessor=Goldmont Plus | |predecessor=Goldmont Plus | ||
|predecessor link=intel/microarchitectures/goldmont plus | |predecessor link=intel/microarchitectures/goldmont plus | ||
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| Jacobsville || {{intel|Elkhart Lake|l=core}} || {{intel|Mule Creek Canyon|l=chipset}} | | Jacobsville || {{intel|Elkhart Lake|l=core}} || {{intel|Mule Creek Canyon|l=chipset}} | ||
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Tremont is designed with significant single-thread performance in mind while focusing on low-power small silicon area cores. | Tremont is designed with significant single-thread performance in mind while focusing on low-power small silicon area cores. | ||
=== Key changes from {{\\|Goldmont Plus}} === | === Key changes from {{\\|Goldmont Plus}} === | ||
− | * Significant [[IPC]] uplift ([[Intel]] self-reported average 32% IPC | + | * Significant [[IPC]] uplift ([[Intel]] self-reported average 32% IPC accross proxy benchmarks such as [[SPEC CPU2006]]/[[SPEC CPU2017]]) |
* Front-end | * Front-end | ||
** Redesigned front-end | ** Redesigned front-end |
Facts about "Tremont - Microarchitectures - Intel"
codename | Tremont + |
designer | Intel + |
first launched | 2019 + |
full page name | intel/microarchitectures/tremont + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Tremont + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |