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| | |designer=Intel | | |designer=Intel |
| | |manufacturer=Intel | | |manufacturer=Intel |
| − | |introduction=March 16, 2021
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| | |process=14 nm | | |process=14 nm |
| | |cores=4 | | |cores=4 |
| − | |cores 2=6
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| − | |cores 3=8
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| | |type=Superscalar | | |type=Superscalar |
| | |type 2=Superpipeline | | |type 2=Superpipeline |
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| | |extension 29=SGX | | |extension 29=SGX |
| | |extension 30=MPX | | |extension 30=MPX |
| − | |extension 31=AVX512F | + | |l1i=32 KiB |
| − | |extension 32=SHA
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| − | |l1i=48 KiB
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| | |l1i per=core | | |l1i per=core |
| − | |l1i desc=12-way set associative | + | |l1i desc=8-way set associative |
| | |l1d=32 KiB | | |l1d=32 KiB |
| | |l1d per=core | | |l1d per=core |
| | |l1d desc=8-way set associative | | |l1d desc=8-way set associative |
| − | |l2=512 KiB | + | |l2=256 KiB |
| | |l2 per=core | | |l2 per=core |
| − | |l2 desc=8-way set associative | + | |l2 desc=4-way set associative |
| | |l3=2 MiB | | |l3=2 MiB |
| | |l3 per=core | | |l3 per=core |
| − | |l3 desc=16-way set associative | + | |l3 desc=Up to 16-way set associative |
| − | |core name=Cypress Cove | + | |l4=128 MiB |
| | + | |l4 per=package |
| | + | |l4 desc=on Iris Pro GPUs only |
| | |predecessor=Comet Lake | | |predecessor=Comet Lake |
| | |predecessor link=intel/microarchitectures/comet lake | | |predecessor link=intel/microarchitectures/comet lake |
| − | |successor=Alder Lake
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| − | |successor link=intel/microarchitectures/alder_lake
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| − | |contemporary=Tiger Lake
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| − | |contemporary link=intel/microarchitectures/tiger_lake
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| | }} | | }} |
| − | '''Rocket Lake''' ('''RKL''') is a [[microarchitecture]] designed by [[Intel]] as a successor to {{\\|Comet Lake}} for desktops and single-socket servers. | + | '''Rocket Lake''' is a planned [[microarchitecture]] designed by [[Intel]] as a successor to {{\\|Comet Lake}} for desktops and high-performance mobile devices. |
| − | | |
| − | | |
| − | == Codenames ==
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| − | {| class="wikitable"
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| − | |-
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| − | ! Core !! Description !! Graphics !! Target
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| − | |-
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| − | | {{intel|Rocket Lake S|l=core}} || Mainstream performance || GT2 || Desktop performance to value, AiOs, and minis
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| − | |-
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| − | | {{intel|Rocket Lake U|l=core}} || Ultra-low power|| GT2 || Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room
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| − | |}
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| − | | |
| − | == Brands ==
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| − | Intel has released Rocket Lake under the following brand families:
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| − | | |
| − | {| class="wikitable tc4 tc5 tc6 tc7 tc8" style="text-align: center;"
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| − | |-
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| − | ! rowspan="2" | Logo !! rowspan="2" | Family !! rowspan="2" | General Description !! colspan="6" | Differentiating Features
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| − | |-
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| − | ! Cores !! {{intel|Hyper-Threading|HT}} !! {{x86|AVX}} !! {{x86|AVX2}} !! {{x86|AVX512}} !! {{intel|Thermal Velocity Boost|TVB}} !! [[ECC]]
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| − | |-
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| − | | [[File:core i5 logo (2020).png|50px|link=intel/core_i5]] || {{intel|Core i5}} || Mid-range Performance || [[hexa-core|Hexa]] || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|no}} || {{tchk|no}}
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| − | |-
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| − | | [[File:core i7 logo (2020).png|50px|link=intel/core_i7]] || {{intel|Core i7}} || High-end Performance || [[octa-core|Octa]] || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|no}} || {{tchk|no}}
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| − | |-
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| − | | [[File:core i9 logo (2020).png|50px|link=intel/core_i9]] || {{intel|Core i9}} || High-end Performance || [[octa-core|Octa]] || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|no}}
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| − | |-
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| − | | [[File:xeon logo (2021).png|50px|link=intel/xeon]] || {{intel|Xeon}} || 1S Server & Workstation || [[quad-core|4]]-[[octa-core|8]] || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|no}} || {{tchk|yes}}
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| − | |}
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| − | | |
| − | == Release Dates ==
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| − | Rocket Lake was officially introduced on March 16, 2021 and went on sale from March 30, 2021.
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| − | Limited quantities of the Core i7-11700K were (accidentally?) available through the German reseller Mindfactory on March 6, 2021.
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| − | | |
| − | The Xeon W-1300 Line using Rocket Lake is expected to be officially launched in Q3/2021.
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| − | | |
| − | == Compatibility==
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| − | {{empty section}}
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| − | Rocket Lake will feature the same LGA1200 socket as Comet Lake. Rocket Lake is backwards compatible with [[Comet Lake]]. Rocket Lake will have new motherboards and a new 500 series chipset. Rocket Lake will not be compatible with Alder Lake.
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| − | | |
| − | == Compiler support ==
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| − | {| class="wikitable"
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| − | |-
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| − | ! Compiler !! Arch-Specific || Arch-Favorable
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| − | |-
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| − | | [[ICC]] || <code>-march=?</code> || <code>-mtune=?</code>
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| − | |-
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| − | | [[GCC]] || <code>-march=rocketlake</code> || <code>-mtune=rocketlake</code>
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| − | |-
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| − | | [[LLVM]] || <code>-march=?</code> || <code>-mtune=?</code>
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| − | |-
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| − | | [[Visual Studio]] || <code>/arch:AVX512</code> || <code>/?</code>
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| − | |}
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| − | | |
| − | === CPUID ===
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| − | {{further|intel/cpuid|l1=Intel CPUIDs}}
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| − | {| class="wikitable tc1 tc2 tc3 tc4 tc5"
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| − | ! Core !! Extended<br>Family !! Family !! Extended<br>Model !! Model !! Stepping
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| − | |-
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| − | | rowspan="2" | {{intel|Rocket Lake S|S|l=core}} || 0 || 0x6 || 0xA || 0x7 || 0x0-0x1
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| − | |-
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| − | | colspan="5" | Family 6 Model 167 Stepping 0-1<br>Stepping: A0=0, B0=1
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| − | |}
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| − | | |
| − | == Architecture ==
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| − | === Key changes from {{\\|Comet Lake}}===
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| − | {{future information}}
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| − | * Core
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| − | ** {{\\|Skylake}} '''➡''' {{\\|Cypress Cove}}
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| − | | |
| − | * GPU
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| − | ** {{intel|Gen 9.5|l=arch}} '''➡''' {{intel|Gen12|l=arch}} (Xe)
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| − | ** 32 EUs up from 24 EUs
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| − | | |
| − | * Display
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| − | ** [[DisplayPort]] 1.4a (from DisplayPort 1.2)
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| − | ** [[HDMI]] 2.0b (from HDMI 1.4b)
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| − | | |
| − | * I/O
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| − | ** PCIe 4.0 (from 3.0)
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| − | | |
| − | * Memory
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| − | ** Faster memory for mainstream desktops (i.e., {{intel|Rocket Lake S|l=core}}) DDR4-3200 (from DDR4-2933)
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| − | | |
| − | * Chipset
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| − | ** {{intel|Cannon Point|400 Series chipset|l=chipset}} → {{intel|Rocket Point|500 Series chipset|l=chipset}}
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| − | *** 2.5G Ethernet (Foxville) support
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| − | *** Integrated WiFi 6 AX201 (GiG+) support via {{intel|CNVi}}
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| − | | |
| − | * Packaging
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| − | ** [[Die thinning]] on top-end SKUs for better heat removal
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| − | | |
| − | == See also ==
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