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|manufacturer=Intel | |manufacturer=Intel | ||
|process=10 nm | |process=10 nm | ||
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|predecessor=Knights Landing | |predecessor=Knights Landing | ||
|predecessor link=intel/microarchitectures/knights_landing | |predecessor link=intel/microarchitectures/knights_landing | ||
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}} | }} | ||
− | '''Knights Hill''' ('''KNH''') was | + | '''Knights Hill''' ('''KNH''') was [[Intel]]'s planned successor to {{\\|Knights Landing}}, a [[10 nm]] [[many-core]] microarchitecture for research and supercomputers. |
== History == | == History == | ||
[[File:XeonPhiGenerations.jpg|right|500px]] | [[File:XeonPhiGenerations.jpg|right|500px]] | ||
− | + | Knights Hill was originally planned to be delivered in 2016 and manufactured on a [[10 nm process]]. Knights Hill was planned to power a number of supercomputers, including the United States highest-performance supercomputer, [[aurora (supercomputer)|Aurora]]. Delays with [[10 nm]] has pushed the product back to 2017. In November 2017 Intel announced that Knights Hill would be cancelled: | |
<blockquote>One step we’re taking is to replace one of the future Intel® Xeon Phi™ processors (code name Knights Hill) with a new platform and new microarchitecture specifically designed for exascale.</blockquote> | <blockquote>One step we’re taking is to replace one of the future Intel® Xeon Phi™ processors (code name Knights Hill) with a new platform and new microarchitecture specifically designed for exascale.</blockquote> |
Facts about "Knights Hill - Microarchitectures - Intel"
codename | Knights Hill + |
designer | Intel + |
full page name | intel/microarchitectures/knights hill + |
instance of | microarchitecture + |
instruction set architecture | x86-16 +, x86-32 + and x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Knights Hill + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |