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** Radix-1024 floating point divider for fast scalar/packed single, double and extended precision floating point divides | ** Radix-1024 floating point divider for fast scalar/packed single, double and extended precision floating point divides | ||
** Improved {{x86|AES}} instruction latency and throughput. | ** Improved {{x86|AES}} instruction latency and throughput. | ||
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* New Integration | * New Integration | ||
** {{intel|CNVi|Integrated Connectivity CNVi}} | ** {{intel|CNVi|Integrated Connectivity CNVi}} | ||
*** Supports up to Wireless-AC CRFs | *** Supports up to Wireless-AC CRFs | ||
+ | * Cache | ||
+ | ** 64 KiB 2nd level pre-decode cache (16 KiB) | ||
+ | ** 4 MiB L2 per quad core cluster (Up from 1 MiB per duplex) | ||
+ | * Graphics | ||
+ | ** {{intel|Gen 9.5|l=arch}} execution engines, {{intel|Gen 10|l=arch}} Display | ||
** HDMI 2.0 (from 1.4a) | ** HDMI 2.0 (from 1.4a) | ||
*** 2160p (4K) @ 60 Hz (from 24 Hz) | *** 2160p (4K) @ 60 Hz (from 24 Hz) |
Facts about "Goldmont Plus - Microarchitectures - Intel"
codename | Goldmont Plus + |
core count | 2 + and 4 + |
designer | Intel + |
first launched | December 11, 2017 + |
full page name | intel/microarchitectures/goldmont plus + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Goldmont Plus + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |