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'''Kaby Lake G''' ('''KBL-G''') is the name of the core for [[Intel]]'s high-performance line of mobile processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture and incorporate a discrete [[AMD]] {{amd|Vega|l=arch}} graphics processor. These chips are targeted towards ultimate mobile gaming experience. Kaby Lake G processors are fabricated on Intel's enhanced [[14 nm lithography process|14nm+ process]] and for graphics, GlobalFoundries [[14 nm process]]. | '''Kaby Lake G''' ('''KBL-G''') is the name of the core for [[Intel]]'s high-performance line of mobile processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture and incorporate a discrete [[AMD]] {{amd|Vega|l=arch}} graphics processor. These chips are targeted towards ultimate mobile gaming experience. Kaby Lake G processors are fabricated on Intel's enhanced [[14 nm lithography process|14nm+ process]] and for graphics, GlobalFoundries [[14 nm process]]. | ||
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+ | {{future information}} | ||
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== Overview == | == Overview == | ||
[[File:8th gen core i7 with radeon logo (2018).png|250px|right]] | [[File:8th gen core i7 with radeon logo (2018).png|250px|right]] | ||
[[File:8th gen core i5 with radeon logo (2018).png|250px|right]] | [[File:8th gen core i5 with radeon logo (2018).png|250px|right]] | ||
− | + | Kaby Lake G based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Those parts are [[BGA]] and are soldered onto the motherboard. The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's proprietary {{intel|Direct Media Interface}} 3.0 (DMI 3.0), allowing for 8 GT/s transfer rate per lane. | |
− | Kaby Lake G based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Those parts are [[BGA]] and are soldered onto the motherboard. The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's proprietary {{intel|Direct Media Interface}} 3.0 (DMI 3.0), allowing for 8 GT/s transfer rate per lane | ||
=== Graphics === | === Graphics === | ||
− | Those processors are unique in the fact that this is the first time Intel has integrated a discrete graphics processor into the same package as the microprocessor. This is also the first time they are using a competitor | + | Those processors are unique in the fact that this is the first time Intel has integrated a discrete graphics processor into the same package as the microprocessor. This is also the first time they are using a competitor graphics processor. Those parts incorporate an [[AMD]] [[GPU]] based on the {{amd|Vega|l=arch}} microarchitecture and incorporate their own 4 GiB of [[high-bandwidth memory]] 2 (HBM2). The HBM solution is connected to the graphics processor using Intel's [[EMIB]], a high-speed in-package interconnect solution. |
The CPU itself is connected to the GPU using 8 of the other PCIe lanes, leaving the 8 remaining lanes for other peripherals to communicate with the CPU directly. | The CPU itself is connected to the GPU using 8 of the other PCIe lanes, leaving the 8 remaining lanes for other peripherals to communicate with the CPU directly. | ||
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[[File:kaby lake g with amd radeon package.png|600px]] | [[File:kaby lake g with amd radeon package.png|600px]] | ||
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=== Common Features === | === Common Features === | ||
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{{comp table start}} | {{comp table start}} | ||
− | <table class="comptable sortable tc4 tc5 tc13 | + | <table class="comptable sortable tc4 tc5 tc12 tc13"> |
− | {{comp table header|main| | + | {{comp table header|main|12:List of Kaby Lake G-based Processors}} |
− | {{comp table header|main| | + | {{comp table header|main|7:Main processor|3:Graphics Processors|2:Features}} |
− | {{comp table header|cols|Launched|Family|C|T|L3$ | + | {{comp table header|cols|Launched|Family|C|T|L3$|%Frequency|%Turbo|GPU|Base|Burst|vPro|Locked}} |
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake G]] | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake G]] | ||
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|?thread count | |?thread count | ||
|?l3$ size | |?l3$ size | ||
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|?base frequency#GHz | |?base frequency#GHz | ||
|?turbo frequency (1 core)#GHz | |?turbo frequency (1 core)#GHz | ||
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|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=14:13 |
|mainlabel=- | |mainlabel=- | ||
|valuesep=, | |valuesep=, |
Facts about "Kaby Lake G - Cores - Intel"
designer | Intel + and AMD + |
first announced | November 6, 2017 + |
first launched | January 7, 2018 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
main image | + |
main image caption | Package front + |
manufacturer | Intel + and GlobalFoundries + |
microarchitecture | Kaby Lake + |
name | Kaby Lake G + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |