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{{intel title|Kaby Lake DT|core}}
 
{{intel title|Kaby Lake DT|core}}
 
{{core
 
{{core
|name=Kaby Lake DT
+
| name             = Kaby Lake DT
|image=kaby lake dt (front).png
+
| image             = kaby lake dt (front).png
|image 2=kaby lake dt (back).png
+
| image size        = 250px
|developer=Intel
+
| image 2           = kaby lake dt (back).png
|manufacturer=Intel
+
| image 2 size      = 250px
|first announced=March 28, 2017
+
| developer         = Intel
|first launched=March 28, 2017
+
| manufacturer     = Intel
|isa=x86-64
+
| first announced   = March 28, 2017
|microarch=Kaby Lake
+
| first launched   = March 28, 2017
|platform=Greenlow
+
| isa               = x86-64
|word=64 bit
+
| microarch         = Kaby Lake
|proc=14 nm
+
| word             = 64 bit
|tech=CMOS
+
| proc             = 14 nm
|clock min=3,000 MHz
+
| tech             = CMOS
|clock max=3,900 MHz
+
| clock min         = 3,000 MHz
|predecessor=Skylake DT
+
| clock max         = 3,900 MHz
|predecessor link=intel/cores/skylake dt
+
| package           = FCLGA-1151
|successor=Coffee Lake E
+
| socket           = LGA-1151
|successor link=intel/cores/coffee lake e
 
|package=FCLGA-1151
 
|socket=LGA-1151
 
|succession=Yes
 
}}
 
'''Kaby Lake DT''' ('''KBL-DT''') is the name of the core for [[Intel]]'s workstations and entry-level servers line of processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a successor to {{intel|Skylake DT|l=core}}. These chips are primarily targeted towards professional-grade workstation and entry-level servers. Kaby Lake DT processors are fabricated on Intel's enhanced [[14 nm lithography process|14nm+ process]] and provide {{intel|kaby_lake#Key_changes_from_Skylake|slight enhancements over|l=arch}} comparable Skylake models.
 
 
 
== Overview ==
 
Kaby Lake DT based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Kaby Lake DT are {{intel|LGA-1151|Socket LGA-1151}} and use {{intel|Union Point}} chipset ({{intel|Platform Controller Hub|HUB}}) but they may also use previous generation ({{intel|Skylake DT|l=core}}) {{intel|Sunrise Point}}. The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's proprietary {{intel|Direct Media Interface}} 3.0 (DMI 3.0), allowing for 8 GT/s transfer rate per lane.
 
 
 
=== Common Features ===
 
All Kaby Lake DT processors have the following:
 
 
 
* Dual-channel Memory
 
** Up to DDR3L-1866, DDR4-2400
 
** Up to 64 GiB
 
** Has ECC support
 
* 16x PCIe (4 of the 20 are used by the bus as described above)
 
* [[quad-core]] with 4 to 8 threads (not all DT models support {{intel|Hyper-Threading}})
 
* Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2)
 
* Has support for {{intel|Turbo Boost|Turbo Boost 2.0}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|VT-d}}/{{intel|EPT}}, {{intel|TSX}}, {{intel|SpeedStep}}, {{intel|Identity Protection}}, {{intel|Secure Key}}, Software Guard ({{intel|SGX}}), Memory Protection ({{intel|MPX}}), {{intel|OS Guard}}, {{intel|TXT}}
 
* Graphics
 
** {{intel|HD Graphics P630}} ({{intel|Gen9.5|l=arch}} GT2)
 
** Base frequency of 350 MHz
 
** Burst frequency of 1.15 GHz
 
{{clear}}
 
  
== Kaby Lake DT Processors ==
+
| succession      = Yes
<!-- NOTE:
+
| predecessor      = Skylake DT
          This table is generated automatically from the data in the actual articles.
+
| predecessor link = intel/cores/skylake dt
          If a microprocessor is missing from the list, an appropriate article for it needs to be
+
| successor        = Cannonlake DT
          created and tagged accordingly.
+
| successor link  = intel/cores/cannonlake dt
 
 
          Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
 
-->
 
{{comp table start}}
 
<table class="comptable sortable tc15 tc16 tc17 tc18 tc19">
 
<tr class="comptable-header"><th>&nbsp;</th><th colspan="20">List of Kaby Lake DT Processors</th></tr>
 
<tr class="comptable-header"><th>&nbsp;</th><th colspan="10">Main processor</th><th colspan="3">IGP</th><th colspan="7">Major Feature Diff</th></tr>
 
<tr class="comptable-header"><th class="unsortable">Model</th><th>Launched</th><th data-sort-type="currency">Price</th><th>Family</th><th data-sort-type="number">C</th><th data-sort-type="number">T</th><th data-sort-type="number">L3$</th><th data-sort-type="number">TDP</th><th data-sort-type="number">Frequency</th><th data-sort-type="number">Turbo</th><th data-sort-type="number">Max Mem</th><th>Name</th><th data-sort-type="number">Frequency</th><th data-sort-type="number">Turbo</th><th>{{intel|Hyper-Threading}}</th></tr>
 
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake DT]]
 
|?full page name
 
|?model number
 
|?first launched
 
|?release price
 
|?microprocessor family
 
|?core count
 
|?thread count
 
|?l3$ size
 
|?tdp
 
|?base frequency#GHz
 
|?turbo frequency (1 core)#GHz
 
|?max memory#GiB
 
|?integrated gpu
 
|?integrated gpu base frequency
 
|?integrated gpu max frequency
 
|?has simultaneous multithreading
 
|format=template
 
|template=proc table 3
 
|searchlabel=
 
|sort=microprocessor family, model number
 
|order=asc,asc
 
|userparam=16:16
 
|mainlabel=-
 
|limit=100
 
 
}}
 
}}
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake DT]]}}
+
'''Kaby Lake DT''' ('''KBL-DT''') is the name of the core for [[Intel]]'s entry-level servers and workstations line of processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a successor to {{intel|Skylake DT|l=core}} core. These chips are primarily targeted towards professional-grade workstation and entry-level servers. Kaby Lake DT processors are fabricated on Intel's enhanced [[14 nm lithography process|14nm+ process]] and provide {{intel|kaby_lake#Key_changes_from_Skylake|slight enhancements over|l=arch}} comparable Skylake models.
</table>
 
{{comp table end}}
 
 
 
== See also ==
 
[[File:xeon-e3-1200v6-4.png|right|300px]]
 
{{intel kaby lake core see also}}
 
* {{intel|Skylake|l=arch}}
 
** {{intel|Skylake DT|l=core}}
 

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designerIntel +
first announcedMarch 28, 2017 +
first launchedMarch 28, 2017 +
instance ofcore +
isax86-64 +
main imageFile:kaby lake dt (front).png + and File:kaby lake dt (back).png +
manufacturerIntel +
microarchitectureKaby Lake +
nameKaby Lake DT +
platformGreenlow +
process14 nm (0.014 μm, 1.4e-5 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +