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{{core | {{core | ||
|name=Ice Lake Y | |name=Ice Lake Y | ||
− | |image= | + | |no image=Yes |
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|developer=Intel | |developer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
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|isa=x86-64 | |isa=x86-64 | ||
|microarch=Ice Lake | |microarch=Ice Lake | ||
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|tech=CMOS | |tech=CMOS | ||
|package name 1=intel,fcbga_1377 | |package name 1=intel,fcbga_1377 | ||
− | |predecessor= | + | |predecessor=Cannon Lake Y |
− | |predecessor link=intel/cores/ | + | |predecessor link=intel/cores/cannon lake y |
|successor=Tiger Lake Y | |successor=Tiger Lake Y | ||
|successor link=intel/cores/tiger lake y | |successor link=intel/cores/tiger lake y | ||
}} | }} | ||
− | '''Ice Lake Y''' ('''ICL-Y''') is | + | '''Ice Lake Y''' ('''ICL-Y''') is the name of the core for [[Intel]]'s extremly-low power line of processors based on the {{intel|Ice Lake|l=arch}} microarchitecture serving as a successor to the {{intel|Cannon Lake Y|l=core}} core. These chips are primarily targeted towards 2-in-1s detachable, tablets, and computer sticks. Cannon Lake Y processors are fabricated on Intel's enhanced [[10 nm process|10nm+ process]] and come at slightly higher clock frequencies. |
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+ | {{future information}} | ||
== Overview == | == Overview == | ||
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=== Common Features === | === Common Features === | ||
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{{clear}} | {{clear}} | ||
== Ice Lake Y Processors == | == Ice Lake Y Processors == | ||
+ | {{future information}} | ||
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<!-- NOTE: | <!-- NOTE: | ||
This table is generated automatically from the data in the actual articles. | This table is generated automatically from the data in the actual articles. | ||
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{{comp table start}} | {{comp table start}} | ||
− | <table class="comptable sortable | + | <table class="comptable sortable tc5 tc6"> |
− | {{comp table header|main| | + | {{comp table header|main|12:List of Ice Lake Y Processors}} |
− | {{comp table header|main| | + | {{comp table header|main|9:Main processor|3:Integrated Graphics}} |
− | {{comp table header|cols|Launched|Family|Cores|Threads|L3$|%TDP|%Frequency|%Turbo|Name|%Frequency|%Turbo}} | + | {{comp table header|cols|Price|Launched|Family|Cores|Threads|L3$|%TDP|%Frequency|%Turbo|Name|%Frequency|%Turbo}} |
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Ice Lake Y]] | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Ice Lake Y]] | ||
|?full page name | |?full page name | ||
|?model number | |?model number | ||
+ | |?release price | ||
|?first launched | |?first launched | ||
|?microprocessor family | |?microprocessor family | ||
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|?l3$ size | |?l3$ size | ||
|?tdp | |?tdp | ||
− | |?base frequency# | + | |?base frequency#GHz |
|?turbo frequency (1 core)#GHz | |?turbo frequency (1 core)#GHz | ||
|?integrated gpu | |?integrated gpu | ||
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|template=proc table 3 | |template=proc table 3 | ||
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}} | }} | ||
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</table> | </table> | ||
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== See also == | == See also == | ||
{{intel ice lake core see also}} | {{intel ice lake core see also}} |
Facts about "Ice Lake Y - Cores - Intel"
back image | + |
designer | Intel + |
first announced | December 2018 + |
first launched | May 27, 2019 + |
instance of | core + |
isa | x86-64 + |
main image | + |
main image caption | Ice Lake Y, front package + |
manufacturer | Intel + |
microarchitecture | Ice Lake + |
name | Ice Lake Y + |
package | FCBGA-1377 + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |
socket | Type 3 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |