Editing intel/cores/diamondville

{{intel title|Diamondville|core}}
{{core
| name              = Diamondville
| image             = atom n270.png
| caption           = Atom N270, a Diamondville chip
| image size        = 
| image 2           = 
| caption 2         = 
| image 2 size      = 
| developer         = Intel
| manufacturer      = Intel
| first announced   = April 18, 2007
| first launched    = June 3, 2008
| isa               = x86-32
| isa 2             = x86-64
| microarch         = Bonnell
| word              = 64
| proc              = 45 nm
| tech              = CMOS
| clock min         = 1,600 MHz
| clock max         = 1,666.66 MHz
| package           = 
| socket            = 
| socket 2          = 

| succession       = Yes
| predecessor      = Stealey
| predecessor link = intel/cores/stealey
| successor        = 
| successor link   = 
}}
'''Diamondville''' is the core name for Intel's  first generation of {{intel|Atom}} processors based on the {{intel|Bonnell|l=arch}} microarchitecture. Those ultra-low power chips were manufactured on Intel's 45 nm process and were specifically aimed for [[nettops]], [[netbooks]], and entry/value desktops. Diamondville effectively replaced {{\\|Stealey}} in the netbooks and entry-level desktops segment.

'''Diamondville-SC''' refers to all the [[single-core]] Diamondville-based microprocessors. In late [[2008]] Intel introduced a single [[dual-core]] variant (the {{intel|Atom 330}}) which went under the '''Diamondville-DC''' codename. The dual-core version is simple two identical Diamondville-SC dies packaged together.

== Overview ==
All models are based on {{intel|Bonnell|l=arch}} manufactured on a [[45 nm process]] and implement [[x86-32]]. Both Diamondville and {{\\|Silverthorne}} use the same [[die]]. A number of Diamondville models do have additional features not enabled on Silverthorne models such as full support for [[x86-64]]. Diamondville generally targets the 4-8 W thermal envelope typically fan-less designs.

=== Common Features ===
* '''TDP:''' 2.5 W to 8 W
* '''ISA:''' Everything up to {{x86|SSSE3}} ({{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}})
* '''Bus:''' 533.33-666.66 MT/s [[FSB]]
* {{intel|Calistoga|l=chipset}} Chipset
* 47,212,207 transistors
* 3.1 mm x 7.8 mm die size
* 24.18 mm² die area
{{clear}}

== Members ==
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           This table is generated automatically from the data in the actual articles.
           If a microprocessor is missing from the list, an appropriate article for it needs to be
           created and tagged accordingly.

           Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
-->
{{comp table start}}
<table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19 tc20 tc21 tc22">
<tr class="comptable-header"><th>&nbsp;</th><th colspan="20">List of Diamondville-based Atom Processors</th></tr>
<tr class="comptable-header"><th>&nbsp;</th><th colspan="8">Main processor</th><th colspan="2">Bus</th><th colspan="4">Features</th></tr>
{{comp table header 1|cols=Family, Price, Process, Launched, C, T, Freq, TDP, Speed, Rate, Package, ISA, EIST, {{intel|Hyper-Threading|HT}}}}
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Diamondville||Diamondville-SC||Diamondville-DC]]
 |?full page name
 |?model number
 |?microprocessor family
 |?release price
 |?process
 |?first launched
 |?core count
 |?thread count
 |?base frequency#GHz
 |?tdp#W
 |?bus speed
 |?bus rate
 |?package
 |?isa
 |?has intel enhanced speedstep technology
 |?has simultaneous multithreading
 |format=template
 |template=proc table 3
 |userparam=16:15
 |mainlabel=-
}}
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Diamondville||Diamondville-SC||Diamondville-DC]]}}
</table>
{{comp table end}}

== Die Shot ==
{{see also|intel/microarchitectures/bonnell#Silverthorne|l1=Bonnell § Silverthorne Die}}
* [[45 nm process]]
* 9 metal layers
* 47,212,207 transistors
* 3.1 mm x 7.8 mm
* 24.18 mm² die size

[[File:Silverthorne die shot.jpg|550px]]


[[File:Silverthorne die shot (marked).png|550px]]

== See Also ==
{{intel bonnell core see also}}
* {{amd|Geode NX}}
designer	Intel +
first announced	April 18, 2007 +
first launched	June 3, 2008 +
instance of	core +
isa	x86-32 + and x86-64 +
main image	+
main image caption	Atom N270, a Diamondville chip +
manufacturer	Intel +
microarchitecture	Bonnell +
name	Diamondville +
process	45 nm (0.045 μm, 4.5e-5 mm) +
technology	CMOS +
word size	64 bit (8 octets, 16 nibbles) +