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| Latest revision | Your text | ||
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|developer=Intel | |developer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
| − | |first announced= | + | |first announced=August 21, 2018 |
| − | |first launched= | + | |first launched=August 21, 2018 |
|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 | ||
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|predecessor=Coffee Lake S | |predecessor=Coffee Lake S | ||
|predecessor link=intel/cores/coffee lake s | |predecessor link=intel/cores/coffee lake s | ||
| − | |successor= | + | |successor=Ice Lake S |
| − | |successor link=intel/cores/ | + | |successor link=intel/cores/ice lake s |
}} | }} | ||
| − | '''Coffee Lake R''' ('''CFL-R | + | '''Coffee Lake R''' ('''CFL-R''') is the name of the core for [[Intel]]'s mainstream performance line of processors based on the {{intel|Coffee Lake|l=arch}} microarchitecture serving as a successor to {{intel|Coffee Lake S|l=core}}. These chips are primarily targeted towards desktop performance to value computers, AiOs, and minis. Coffee Lake R processors are fabricated on Intel's 3rd generation enhanced [[14 nm lithography process|14nm++ process]]. Coffee Lake S is the first series of mainstream desktop PC [[octa-core]] microprocessors from Intel. |
| + | |||
| + | Although those microprocessors are still based on {{intel|Coffee Lake|l=arch}}, Intel has branded them as 9th Generation Core. Those processors are also the first Intel processors to feature octa-cores for the mainstream line. | ||
== Overview == | == Overview == | ||
| − | Coffee Lake R based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Coffee Lake | + | Coffee Lake R based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Coffee Lake S are {{intel|LGA-1151|Socket LGA-1151}} and use {{intel|300-series}} chipset ({{intel|Platform Controller Hub|HUB}}). Despite using the same socket, those chips are not backwards-compatible with {{intel|Union Point}} (or {{intel|Sunrise Point}}). The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's proprietary {{intel|Direct Media Interface}} 3.0 (DMI 3.0), allowing for 8 GT/s transfer rate per lane. |
=== Common Features === | === Common Features === | ||
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** 64 GiB | ** 64 GiB | ||
* 16x PCIe (4 of the 20 are used by the bus as described above) | * 16x PCIe (4 of the 20 are used by the bus as described above) | ||
| − | * [[quad-core|4]] to [[octa-core|8]] core with | + | * [[quad-core|4]] to [[octa-core|8]] core with 8 to 16 threads |
* Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2) | * Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2) | ||
* Graphics | * Graphics | ||
** UHD Graphics ({{intel|Gen9.5|l=arch}}) {{intel|UHD Graphics 610|610}} (GT1), {{intel|UHD Graphics 630|630}} (GT2) | ** UHD Graphics ({{intel|Gen9.5|l=arch}}) {{intel|UHD Graphics 610|610}} (GT1), {{intel|UHD Graphics 630|630}} (GT2) | ||
** Base frequency of 350 MHz | ** Base frequency of 350 MHz | ||
| − | ** Burst frequency of 1-1. | + | ** Burst frequency of 1-1.15 GHz |
{{clear}} | {{clear}} | ||
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|mainlabel=- | |mainlabel=- | ||
|limit=100 | |limit=100 | ||
| − | |||
}} | }} | ||
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Coffee Lake R]]}} | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Coffee Lake R]]}} | ||
Facts about "Coffee Lake R - Cores - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Coffee Lake R - Cores - Intel#package + |
| designer | Intel + |
| first announced | October 8, 2018 + |
| first launched | October 19, 2018 + |
| instance of | core + |
| isa | x86-64 + |
| isa family | x86 + |
| manufacturer | Intel + |
| microarchitecture | Coffee Lake + |
| name | Coffee Lake R + |
| package | FCLGA-1151 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| socket | LGA-1151 + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |