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{{core | {{core | ||
|name=Coffee Lake E | |name=Coffee Lake E | ||
− | |image= | + | |no image=Yes |
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|developer=Intel | |developer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
− | |first announced=July | + | |first announced=July, 2018 |
− | |first launched=July | + | |first launched=July, 2018 |
|isa=x86-64 | |isa=x86-64 | ||
|microarch=Coffee Lake | |microarch=Coffee Lake | ||
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|word=64 bit | |word=64 bit | ||
|proc=14 nm | |proc=14 nm | ||
|tech=CMOS | |tech=CMOS | ||
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|package name 1=intel,fclga_1151 | |package name 1=intel,fclga_1151 | ||
|predecessor=Kaby Lake DT | |predecessor=Kaby Lake DT | ||
|predecessor link=intel/cores/kaby lake dt | |predecessor link=intel/cores/kaby lake dt | ||
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}} | }} | ||
− | '''Coffee Lake E''' ('''CFL- | + | '''Coffee Lake E''' ('''CFL-E''') is the name of the core for [[Intel]]'s workstations and entry-level servers line of processors based on the {{intel|Coffee Lake|l=arch}} microarchitecture serving as a successor to {{intel|Kaby Lake DT|l=core}}. These chips are primarily targeted towards professional-grade workstation and entry-level servers. Coffee Lake E processors are fabricated on Intel's enhanced [[14 nm lithography process|14nm+ process]] and introduced [[hexa-core]] parts. |
== Overview == | == Overview == | ||
− | Coffee Lake E based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Coffee Lake E are {{intel|LGA-1151|Socket LGA-1151}} and use Xeon-class {{intel|Cannon Point}} chipset | + | Coffee Lake E based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Coffee Lake E are {{intel|LGA-1151|Socket LGA-1151}} and use Xeon-class {{intel|Cannon Point}} chipset. The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's proprietary {{intel|Direct Media Interface}} 3.0 (DMI 3.0), allowing for 8 GT/s transfer rate per lane. |
=== Common Features === | === Common Features === | ||
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* [[quad-core|Quad]]/[[hexa-core|Hexa-core]] with 4 to 12 threads (not all E models support {{intel|Hyper-Threading}}) | * [[quad-core|Quad]]/[[hexa-core|Hexa-core]] with 4 to 12 threads (not all E models support {{intel|Hyper-Threading}}) | ||
* Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2) | * Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2) | ||
− | * Has support for {{intel|Turbo Boost|Turbo Boost 2.0}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|VT-d}}/{{intel|EPT}}, {{intel|TSX}}, {{intel|Secure Key}}, Software Guard ({{intel|SGX}}), Memory Protection ({{intel|MPX}}), {{intel|OS Guard}}, {{intel|TXT}} | + | * Has support for {{intel|Turbo Boost|Turbo Boost 2.0}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|VT-d}}/{{intel|EPT}}, {{intel|TSX}}, {{intel|SpeedStep}}, {{intel|Identity Protection}}, {{intel|Secure Key}}, Software Guard ({{intel|SGX}}), Memory Protection ({{intel|MPX}}), {{intel|OS Guard}}, {{intel|TXT}} |
* Graphics | * Graphics | ||
** {{intel|UHD Graphics P630}} ({{intel|Gen9.5|l=arch}} GT2) | ** {{intel|UHD Graphics P630}} ({{intel|Gen9.5|l=arch}} GT2) | ||
** Base frequency of 350 MHz | ** Base frequency of 350 MHz | ||
− | ** Burst frequency of | + | ** Burst frequency of 1.2 GHz |
{{clear}} | {{clear}} | ||
− | == Coffee Lake | + | == Coffee Lake DT Processors == |
<!-- NOTE: | <!-- NOTE: | ||
This table is generated automatically from the data in the actual articles. | This table is generated automatically from the data in the actual articles. | ||
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--> | --> | ||
{{comp table start}} | {{comp table start}} | ||
− | <table class="comptable sortable tc4 tc5 tc6 tc7 tc8 | + | <table class="comptable sortable tc4 tc5 tc6 tc7 tc8"> |
{{comp table header|main|11:List of Coffee Lake E-based Processors}} | {{comp table header|main|11:List of Coffee Lake E-based Processors}} | ||
{{comp table header|main|8:Main processor|3:Integrated Graphics}} | {{comp table header|main|8:Main processor|3:Integrated Graphics}} | ||
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|?model number | |?model number | ||
|?first launched | |?first launched | ||
− | |? | + | |?price |
|?core count | |?core count | ||
|?thread count | |?thread count | ||
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</table> | </table> | ||
{{comp table end}} | {{comp table end}} | ||
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== See also == | == See also == | ||
{{intel coffee lake core see also}} | {{intel coffee lake core see also}} |
Facts about "Coffee Lake E - Cores - Intel"
chipset | Cannon Point + |
designer | Intel + |
first announced | July 12, 2018 + |
first launched | July 12, 2018 + |
instance of | core + |
isa | x86-64 + |
main image | ![]() ![]() |
main image caption | Package, back + |
manufacturer | Intel + |
microarchitecture | Coffee Lake + |
name | Coffee Lake E + |
package | FCLGA-1151 + and FCLGA14C + |
platform | Mehlow + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | Socket H4 + and LGA-1151 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |