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| {{core | | {{core |
| |name=Cascade Lake AP | | |name=Cascade Lake AP |
− | |image=cascade lake ap (front).png | + | |no image=Yes |
| |developer=Intel | | |developer=Intel |
| |manufacturer=Intel | | |manufacturer=Intel |
| |isa=x86-64 | | |isa=x86-64 |
| |microarch=Cascade Lake | | |microarch=Cascade Lake |
− | |platform=Walker Pass | + | |platform=Purley |
| + | |chipset=Lewisburg |
| |word=64 bit | | |word=64 bit |
| |proc=14 nm | | |proc=14 nm |
| |tech=CMOS | | |tech=CMOS |
− | |package name 1=intel,fcbga_5903 | + | |package name 1=intel,bga_5903 |
| }} | | }} |
− | '''Cascade Lake AP''' ('''CLX-AP''', '''Cascade Lake Advanced Performance''') is code name for a series of high core-count multi-chip packaged server [[multiprocessors]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture part of the {{intel|Walker Pass|l=platform}} platform. | + | '''Cascade Lake AP''' is a planned series of server [[multiprocessors]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture as part of the {{intel|Purley|l=platform}} platform. |
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| + | {{future information}} |
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− | Cascade Lake AP-based processors are branded as {{intel|Xeon Platinum}} 9200-series.
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| == Overview == | | == Overview == |
− | Cascade Lake AP comprise of two {{intel|Cascade Lake|l=arch}} dies packaged together a single BGA-5903 substrate. Those processors support up to 56 cores, 112 threads, and up to 12 DDR4 channels.
| + | {{empty section}} |
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− | Cascade Lake AP processors cannot be purchased individually. Instead, they can only be bought as part of the S9200WK compute module (essentially a complete system designed by Intel).
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| === Common Features === | | === Common Features === |
− | * 12-channel memory
| + | {{empty section}} |
− | ** UP to DDR4-2933 MT/s
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− | ** ECC support
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− | * '''TDP:''' 250 W to 400 W
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− | * '''PCIe:''' x40 Lanes of PCIe Gen 3 (limited by the S9200WK module, actual models support more lanes but are not sold independently)
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− | * '''ISA:''' Everything up to {{x86|AVX-512}} (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX512F, AVX512CD, AVX512BW, {{x86|AVX512DQ}}, {{x86|AVX512VL}}, {{x86|AVX512VNNI}})
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− | * '''Features:''' {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}
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− | | |
− | {{clear}}
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− | | |
− | == Cascade Lake AP Processors==
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− | <!-- NOTE:
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− | This table is generated automatically from the data in the actual articles.
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− | If a microprocessor is missing from the list, an appropriate article for it needs to be
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− | created and tagged accordingly.
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− | | |
− | Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
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− | -->
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− | {{comp table start}}
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− | <table class="comptable sortable tc3 tc4 tc5 tc6 tc7 tc8">
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− | {{comp table header|main|11:List of Cascade Lake AP-based Processors}}
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− | {{comp table header|cols|Launched|Cores|Threads|TDP|L2|L3|%Frequency|%Turbo}}
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− | {{#ask: [[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]
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− | |?full page name
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− | |?model number
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− | |?first launched
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− | |?core count
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− | |?thread count
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− | |?tdp
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− | |?l2$ size
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− | |?l3$ size
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− | |?base frequency#GHz
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− | |?turbo frequency (1 core)#GHz
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− | |format=template
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− | |template=proc table 3
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− | |userparam=10
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− | |sort=model number
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− | |mainlabel=-
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− | }}
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− | {{comp table count|ask=[[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]}}
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− | </table>
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− | {{comp table end}}
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− | | |
− | === SKU Comparison ===
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− | Below are a number of SKU comparison graphs based on their specifications.
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− | | |
− | <div style="float: left; margin: 10px">
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− | {{#ask: [[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]
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− | |?core count
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− | |?base frequency
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− | |charttitle=Cores vs. Base Frequency
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− | |numbersaxislabel=Frequency (MHz)
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− | |labelaxislabel=Core Count
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− | |height=400
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− | |width=400
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− | |theme=vector
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− | |group=property
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− | |grouplabel=subject
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− | |charttype=scatter
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− | |format=jqplotseries
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− | |mainlabel=-
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− | }}
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− | </div>
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− | | |
− | <div style="float: left; margin: 10px">
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− | {{#ask: [[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]
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− | |?core count
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− | |?turbo frequency (1 core)
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− | |charttitle=Cores vs. Turbo Frequency
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− | |numbersaxislabel=Frequency (MHz)
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− | |labelaxislabel=Core Count
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− | |height=400
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− | |width=400
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− | |theme=vector
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− | |group=property
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− | |grouplabel=subject
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− | |charttype=scatter
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− | |format=jqplotseries
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− | |mainlabel=-
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− | }}
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− | </div>
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− | | |
− | <div style="float: left; margin: 10px">
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− | {{#ask: [[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]
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− | |?core count
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− | |?tdp
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− | |charttitle=Cores vs. TDP
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− | |numbersaxislabel=TDP (W)
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− | |labelaxislabel=Core Count
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− | |height=400
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− | |width=400
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− | |theme=vector
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− | |group=property
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− | |grouplabel=subject
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− | |charttype=scatter
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− | |format=jqplotseries
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− | |mainlabel=-
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− | }}
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− | </div>
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− | | |
− | <div style="float: left; margin: 10px">
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− | {{#ask: [[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]
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− | |?turbo frequency (1 core)
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− | |?tdp
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− | |charttitle=Frequency vs. TDP
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− | |numbersaxislabel=TDP (W)
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− | |labelaxislabel=Frequency (MHz)
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− | |height=400
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− | |width=400
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− | |theme=vector
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− | |group=property
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− | |grouplabel=subject
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− | |charttype=scatter
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− | |format=jqplotseries
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− | |mainlabel=-
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− | }}
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− | </div>
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| {{clear}} | | {{clear}} |
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− | == Documents == | + | == Cascade Lake AP Processors == |
− | * [[:File:S9200WK-Reference-Design-Guide.pdf|S9200WK reference design guide]]
| + | {{empty section}} |
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| == See also == | | == See also == |
| {{intel cascade lake core see also}} | | {{intel cascade lake core see also}} |