From WikiChip
Editing intel/core m/m5-6y57
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Facts about "Core m5-6Y57 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core m5-6Y57 - Intel#io + |
base frequency | 1,100 MHz (1.1 GHz, 1,100,000 kHz) + |
bus type | DMI 3.0 + |
clock multiplier | 11 + |
core count | 2 + |
core family | 6 + |
core model | 78 + |
core name | Skylake Y + |
core stepping | D1 + |
designer | Intel + |
device id | 0x191E + |
die area | 98.57 mm² (0.153 in², 0.986 cm², 98,570,000 µm²) + |
die count | 2 + |
die length | 10.3 mm (1.03 cm, 0.406 in, 10,300 µm) + |
die width | 9.57 mm (0.957 cm, 0.377 in, 9,570 µm) + |
drivers url | https://downloadcenter.intel.com/product/94026 + |
family | Core m5 + |
first announced | September 1, 2015 + |
first launched | September 27, 2015 + |
full page name | intel/core m/m5-6y57 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Hyper-Threading Technology +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Secure Key Technology +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Turbo Boost Technology 2.0 +, Trusted Execution Technology +, Intel vPro Technology +, Transactional Synchronization Extensions +, Stable Image Platform Program +, OS Guard +, Extended Page Tables +, Memory Protection Extensions + and Software Guard Extensions + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel my wifi technology support | true + |
has intel secure key technology | true + |
has intel smart response technology support | true + |
has intel stable image platform program support | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics 515 + |
integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 24 + |
integrated gpu max frequency | 900 MHz (0.9 GHz, 900,000 KHz) + |
integrated gpu max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB) + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
ldate | September 27, 2015 + |
main image | ![]() |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) + |
max memory bandwidth | 27.81 GiB/s (28,477.44 MiB/s, 29.861 GB/s, 29,860.76 MB/s, 0.0272 TiB/s, 0.0299 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 10 + |
microarchitecture | Skylake + |
min junction temperature | 278.15 K (5 °C, 41 °F, 500.67 °R) + |
model number | m5-6Y57 + |
name | Core m5-6Y57 + |
package | FCBGA-1515 + |
part number | HE8066201922876 + |
platform | Skylake + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 281.00 (€ 252.90, £ 227.61, ¥ 29,035.73) + |
s-spec | SR2EG + |
sdp | 3 W (3,000 mW, 0.00402 hp, 0.003 kW) + |
series | m-6Y + |
smp max ways | 1 + |
supported memory type | LPDDR3-1866 + and DDR3L-1600 + |
tdp | 4.5 W (4,500 mW, 0.00603 hp, 0.0045 kW) + |
tdp down | 3.5 W (3,500 mW, 0.00469 hp, 0.0035 kW) + |
tdp down frequency | 600 MHz (0.6 GHz, 600,000 kHz) + |
tdp up | 7 W (7,000 mW, 0.00939 hp, 0.007 kW) + |
tdp up frequency | 1,500 MHz (1.5 GHz, 1,500,000 kHz) + |
technology | CMOS + |
thread count | 4 + |
transistor count | 1,750,000,000 + |
turbo frequency (1 core) | 2,800 MHz (2.8 GHz, 2,800,000 kHz) + |
turbo frequency (2 cores) | 2,400 MHz (2.4 GHz, 2,400,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |