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{{intel title|Core i5-7Y54}}
 
{{intel title|Core i5-7Y54}}
{{chip
+
{{mpu
|name=Core i5-7Y54
+
| name               = Core i5-7Y54
|image=kaby lake y (front).png
+
| no image           = Yes
|image size=250px
+
| image              =  
|designer=Intel
+
| image size         =
|manufacturer=Intel
+
| caption            =  
|model number=i5-7Y54
+
| designer           = Intel
|part number=HE8067702739826
+
| manufacturer       = Intel
|s-spec=SR2ZX
+
| model number       = i5-7Y54
|s-spec 2=SR345
+
| part number         = HE8067702739826
|market=Mobile
+
| part number 1      =
|first announced=August 30, 2016
+
| part number 2      =
|first launched=August 30, 2016
+
| s-spec             = SR2ZX
|release price=$281.00
+
| market             = Mobile
|family=Core i5
+
| first announced     = August 30, 2016
|series=i5-7Y
+
| first launched     = August 30, 2016
|locked=Yes
+
| last order          =
|frequency=1,200 MHz
+
| last shipment      =
|turbo frequency1=3,200 MHz
+
| release price       = $281.00
|turbo frequency=Yes
+
 
|bus type=OPI
+
| family             = Core i5
|bus rate=4 GT/s
+
| series             = i5-7Y
|clock multiplier=12
+
| locked             = Yes
|isa=x86-64
+
| frequency           = 1,200 MHz
|isa family=x86
+
| turbo frequency    = Yes
|microarch=Kaby Lake
+
| turbo frequency1   = 3,200 MHz
|platform=Kaby Lake
+
| turbo frequency2    =
|core name=Kaby Lake Y
+
| turbo frequency3    =
|core family=6
+
| turbo frequency4    =  
|core model=142
+
| bus type           = OPI
|core stepping=H0
+
| bus speed          =
|process=14 nm
+
| bus rate           = 4 GT/s
|technology=CMOS
+
| bus links          =
|word size=64 bit
+
| clock multiplier   = 12
|core count=2
+
| cpuid              =
|thread count=4
+
 
|max cpus=1
+
| isa family          = x86
|max memory=16 GiB
+
| isa                 = x86-64
|v core min=0.55 V
+
| microarch           = Kaby Lake
|v core max=1.52 V
+
| platform           = Kaby Lake
|tdp=4.5 W
+
| chipset            =
|ctdp down=3.5 W
+
| core name           = Kaby Lake Y
|ctdp down frequency=600 MHz
+
| core family         = 6
|ctdp up=7 W
+
| core model         = 142
|ctdp up frequency=1,600 MHz
+
| core stepping       = H0
|tjunc min=0 °C
+
| core stepping 2    =
|tjunc max=100 °C
+
| process             = 14 nm
|tstorage min=-25 °C
+
| transistors        =
|tstorage max=125 °C
+
| technology         = CMOS
|package name 1=intel,fcbga_1515
+
| die area            =
 +
| die width          =
 +
| die length          =
 +
| word size           = 64 bit
 +
| core count         = 2
 +
| thread count       = 4
 +
| max cpus           = 1
 +
| max memory         = 16 GiB
 +
 
 +
| electrical          = Yes
 +
| v core min         = 0.55 V
 +
| v core max         = 1.52 V
 +
| sdp                =
 +
| tdp                 = 4.5 W
 +
| tdp typical        =
 +
| ctdp down           = 3.5 W
 +
| ctdp down frequency = 600 MHz
 +
| ctdp up             = 7 W
 +
| ctdp up frequency   = 1,600 MHz
 +
| tjunc min           = 0 °C
 +
| tjunc max           = 100 °C
 +
| tcase min          =
 +
| tcase max          =
 +
| tstorage min       = -25 °C
 +
| tstorage max       = 125 °C
 +
| tambient min        =
 +
| tambient max        =
 +
 
 +
| packaging          = Yes
 +
| package 0          = FCBGA-1515
 +
| package 0 type      = FCBGA
 +
| package 0 pins      = 1515
 +
| package 0 pitch    = 0.4 mm
 +
| package 0 width    = 20 mm
 +
| package 0 length    = 16.5 mm
 +
| package 0 height    =
 +
| socket 0            = BGA-1515
 +
| socket 0 type      = BGA
 
}}
 
}}
'''Core i5-7Y54''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2016]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The i5-7Y54 operates at 1.2 GHz with a TDP of 4.5 W supporting a {{intel|Turbo Boost}} frequency of 3.2 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's {{intel|HD Graphics 615}} [[IGP]] operating at 300 MHz with a burst frequency of 950 MHz.
+
'''Core i5-7Y54''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The i5-7Y54 operates at 1.2 GHz with a TDP of 4.5 W supporting a {{intel|Turbo Boost}} frequency of 3.2 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's {{intel|HD Graphics 615}} [[IGP]] operating at 300 MHz with a burst frequency of 950 MHz.
  
This specific model has a configurable TDP-down of 3.5 W with a frequency of 600 MHz and a configurable TDP-up of 7 W with a frequency of 1.6 GHz.
 
 
== Cache ==
 
== Cache ==
 
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
 
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
Line 61: Line 97:
 
|l1i break=2x32 KiB
 
|l1i break=2x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
 +
|l1i policy=write-back
 
|l1d cache=64 KiB
 
|l1d cache=64 KiB
 
|l1d break=2x32 KiB
 
|l1d break=2x32 KiB
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| intel clear video hd = Yes
 
| intel clear video hd = Yes
 
}}
 
}}
{{kaby lake hardware accelerated video table|col=1}}
 
  
 
== Features ==  
 
== Features ==  
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|avx=Yes
 
|avx=Yes
 
|avx2=Yes
 
|avx2=Yes
 
+
|avx512=No
 
|abm=Yes
 
|abm=Yes
 
|tbm=No
 
|tbm=No

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Facts about "Core i5-7Y54 - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i5-7Y54 - Intel#io +
base frequency1,200 MHz (1.2 GHz, 1,200,000 kHz) +
bus rate4,000 MT/s (4 GT/s, 4,000,000 kT/s) +
bus typeOPI +
clock multiplier12 +
core count2 +
core family6 +
core model142 +
core nameKaby Lake Y +
core steppingH0 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.55 V (5.5 dV, 55 cV, 550 mV) +
designerIntel +
device id0x591E +
familyCore i5 +
first announcedAugust 30, 2016 +
first launchedAugust 30, 2016 +
full page nameintel/core i5/i5-7y54 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Speed Shift Technology +, Intel VT-x +, Intel VT-d +, Secure Key Technology +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology +, Advanced Vector Extensions +, Enhanced SpeedStep Technology +, OS Guard +, Extended Page Tables +, Memory Protection Extensions + and Software Guard Extensions +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has intel my wifi technology supporttrue +
has intel secure key technologytrue +
has intel smart response technology supporttrue +
has intel speed shift technologytrue +
has intel supervisor mode execution protectiontrue +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuHD Graphics 615 +
integrated gpu base frequency300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units24 +
integrated gpu max frequency950 MHz (0.95 GHz, 950,000 KHz) +
integrated gpu max memory16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB) +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description12-way set associative +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
ldateAugust 30, 2016 +
main imageFile:kaby lake y (front).png +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) +
max memory bandwidth27.81 GiB/s (28,477.44 MiB/s, 29.861 GB/s, 29,860.76 MB/s, 0.0272 TiB/s, 0.0299 TB/s) +
max memory channels2 +
max pcie lanes10 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureKaby Lake +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberi5-7Y54 +
nameCore i5-7Y54 +
packageFCBGA-1515 +
part numberHE8067702739826 +
platformKaby Lake +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 281.00 (€ 252.90, £ 227.61, ¥ 29,035.73) +
s-specSR2ZX + and SR345 +
seriesi5-7Y +
smp max ways1 +
supported memory typeDDR3L-1600 + and LPDDR3-1866 +
tdp4.5 W (4,500 mW, 0.00603 hp, 0.0045 kW) +
tdp down3.5 W (3,500 mW, 0.00469 hp, 0.0035 kW) +
tdp down frequency600 MHz (0.6 GHz, 600,000 kHz) +
tdp up7 W (7,000 mW, 0.00939 hp, 0.007 kW) +
tdp up frequency1,600 MHz (1.6 GHz, 1,600,000 kHz) +
technologyCMOS +
thread count4 +
turbo frequency (1 core)3,200 MHz (3.2 GHz, 3,200,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +