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| microarch 9 = Haswell | | microarch 9 = Haswell | ||
| microarch 10 = Broadwell | | microarch 10 = Broadwell | ||
− | | microarch 11 = | + | | microarch 11 = Airmont |
− | | microarch 12 = | + | | microarch 12 = Goldmont |
− | | microarch 13 = | + | | microarch 13 = Skylake |
− | | microarch 14 = | + | | microarch 14 = Kaby Lake |
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| word = 32 bit | | word = 32 bit | ||
| word 2 = 64 bit | | word 2 = 64 bit | ||
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| socket = BGA1170 | | socket = BGA1170 | ||
}} | }} | ||
− | '''Celeron''' is a family of low-end [[x86]] microprocessors developed by [[Intel]] and targets the ultra-cheap PC market. Celeron is the lowest tier [[x86]] family offered by Intel, below {{intel|Pentium (2009)|Pentium}} and has significantly lower performance capabilities than the higher-end processors. Introduced in April of 1998, Celeron is Intel's second longest serving family of processors after {{intel|Pentium}}. | + | '''Celeron''' is a family of low-end [[x86]] microprocessors developed by [[Intel]] and targets the ultra-cheap PC market. Celeron is the lowest tier [[x86]] family offered by Intel, below {{intel|Pentium (2009)|Pentium}} and has significantly lower performance capabilities than the higher-end processors. Introduced in April of 1998, Celeron is Intel's the second longest serving family of processors after {{intel|Pentium}}. |
== Overview == | == Overview == | ||
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* '''Bus:''' {{intel|DMI}} (2.5 GT/s) interface | * '''Bus:''' {{intel|DMI}} (2.5 GT/s) interface | ||
* '''TDP:''' 18, 35 W | * '''TDP:''' 18, 35 W | ||
− | * '''ISA:''' Everything up to {{x86|SSSE3}} ({{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}) | + | * '''ISA:''' Everything up to {{x86|SSSE3}} ({{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}). |
− | * '''Tech:''' {{intel| | + | * '''Tech:''' {{intel|EIST}}, {{intel|VT-x}}. |
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− | + | <table class="wikitable sortable"> | |
− | <table class=" | + | <tr><th colspan="11" style="background:#D6D6FF;">Arrandale-based Celeron Microprocessors</th></tr> |
− | <tr | + | <tr><th colspan="8">CPU</th><th colspan="3">IGP</th></tr> |
− | <tr | + | <tr><th>Model</th><th>Price</th><th>Launched</th><th>C</th><th>T</th><th>TDP</th><th>Freq</th><th>L3$</th><th>IGP Name</th><th>Frequency</th><th>Turbo</th></tr> |
− | + | {{#ask: [[Category:microprocessor models by intel]] [[microprocessor family::Celeron]] [[market segment::Mobile||Embedded]] [[core name::Arrandale]] [[tdp::>19]] | |
− | < | ||
− | {{#ask: [[Category:microprocessor models by intel | ||
|?full page name | |?full page name | ||
− | |?model number | + | |?model number= |
|?release price | |?release price | ||
|?first launched | |?first launched | ||
|?core count | |?core count | ||
|?thread count | |?thread count | ||
− | |||
|?tdp | |?tdp | ||
− | |? | + | |?base frequency |
+ | |?l3$ size | ||
|?integrated gpu | |?integrated gpu | ||
− | |?integrated gpu base frequency | + | |?integrated gpu base frequency |
− | |?integrated gpu max frequency | + | |?integrated gpu max frequency |
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− | |template=proc table | + | |template=proc table 2 |
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}} | }} | ||
− | + | {{table sep|col=11|Ultra-low Power}} | |
− | {{#ask: [[Category:microprocessor models by intel | + | {{#ask: [[Category:microprocessor models by intel]] [[microprocessor family::Celeron]] [[market segment::Mobile||Embedded]] [[core name::Arrandale]] [[tdp::<18]] |
|?full page name | |?full page name | ||
− | |?model number | + | |?model number= |
|?release price | |?release price | ||
|?first launched | |?first launched | ||
|?core count | |?core count | ||
|?thread count | |?thread count | ||
− | |||
|?tdp | |?tdp | ||
− | |? | + | |?base frequency |
+ | |?l3$ size | ||
|?integrated gpu | |?integrated gpu | ||
− | |?integrated gpu base frequency | + | |?integrated gpu base frequency |
− | |?integrated gpu max frequency | + | |?integrated gpu max frequency |
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}} | }} | ||
− | {{ | + | {{table count|col=11|ask=[[Category:microprocessor models by intel]] [[microprocessor family::Celeron]] [[market segment::Mobile||Embedded]] [[core name::Arrandale]]}} |
</table> | </table> | ||
− | |||
=== Sandy Bridge µarch === | === Sandy Bridge µarch === | ||
{{main|intel/microarchitectures/sandy_bridge|l1=Sandy Bridge Microarchitecture}} | {{main|intel/microarchitectures/sandy_bridge|l1=Sandy Bridge Microarchitecture}} | ||
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=== Ivy Bridge µarch === | === Ivy Bridge µarch === | ||
{{main|intel/microarchitectures/ivy_bridge|l1=Ivy Bridge Microarchitecture}} | {{main|intel/microarchitectures/ivy_bridge|l1=Ivy Bridge Microarchitecture}} | ||
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Desktop {{intel|Kaby Lake|l=arch}}-based budget Celeron processors were introduced in early [[2017]]. Those models use standard {{intel|LGA-1151|Socket LGA-1151}}. While no major new features were introduced, those Kaby Lake Celeron models enjoy a modest performance increase due to their slightly higher clock frequency. Additionally, all models share the following common: | Desktop {{intel|Kaby Lake|l=arch}}-based budget Celeron processors were introduced in early [[2017]]. Those models use standard {{intel|LGA-1151|Socket LGA-1151}}. While no major new features were introduced, those Kaby Lake Celeron models enjoy a modest performance increase due to their slightly higher clock frequency. Additionally, all models share the following common: | ||
− | + | * '''TDP:''' 35 W, 51 W, and 54 W | |
− | |||
− | * '''TDP:''' 51 | ||
* '''ISA:''' Everything up to SSE4.2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES) | * '''ISA:''' Everything up to SSE4.2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES) | ||
− | * '''Tech:''' {{intel|VT-x}}, {{intel|VT-d}}, {{intel| | + | * '''Tech:''' {{intel|VT-x}}, {{intel|VT-d}}, {{intel|TSX}}, {{intel|SpeedStep}} (EIST), Software Guard ({{intel|SGX}}), Memory Protection ({{intel|MPX}}), {{intel|OS Guard}}, {{intel|Secure Key}}, and {{intel|Speed Shift}} |
− | * '''GPU:''' {{intel|HD Graphics 610}} @ 350 MHz with bursts of | + | * '''GPU:''' {{intel|HD Graphics 610}} @ 350 MHz with bursts of 1-1.05 GHz |
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− | Missing a chip? please dump its name here: | + | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips |
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{{comp table start}} | {{comp table start}} | ||
− | <table class="comptable sortable | + | <table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19"> |
− | + | <tr class="comptable-header"><th> </th><th colspan="12">List of Kaby Lake-based Celeron Desktop Processors</th></tr> | |
− | + | <tr class="comptable-header"><th> </th><th colspan="9">Main processor</th><th colspan="3">IGP</th></tr> | |
− | {{comp table header|cols | + | {{comp table header 1|cols=Price, Process, Launched, Cores, Threads, L3$, Frequency, TDP, Max Mem, Name, Frequency, Turbo Frequency}} |
− | + | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Celeron]] [[microarchitecture::Kaby Lake]] [[market segment::Desktop||Embedded]] | |
− | {{#ask: [[Category:microprocessor models by intel]] [[ | ||
|?full page name | |?full page name | ||
|?model number | |?model number | ||
|?release price | |?release price | ||
+ | |?process | ||
|?first launched | |?first launched | ||
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|?core count | |?core count | ||
|?thread count | |?thread count | ||
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− | |?integrated gpu base frequency | + | |?integrated gpu base frequency#MHz |
− | |?integrated gpu max frequency | + | |?integrated gpu max frequency#GHz |
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=14 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
− | {{comp table count|ask=[[Category:microprocessor models by intel]] [[ | + | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Celeron]] [[microarchitecture::Kaby Lake]] [[market segment::Desktop]]}} |
</table> | </table> | ||
{{comp table end}} | {{comp table end}} | ||
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* '''ISA:''' Everything up to SSE4.2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES) | * '''ISA:''' Everything up to SSE4.2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES) | ||
* '''Tech:''' {{intel|vPro}}, {{intel|VT-x}}, {{intel|VT-d}}, {{intel|TSX}}, {{intel|SpeedStep}} (EIST), Software Guard ({{intel|SGX}}), Memory Protection ({{intel|MPX}}), {{intel|OS Guard}}, {{intel|Secure Key}}, {{intel|Speed Shift}}, {{intel|Flex Memory Access}}, {{intel|Smart Response Technology}}, {{intel|My WiFi Technology}} | * '''Tech:''' {{intel|vPro}}, {{intel|VT-x}}, {{intel|VT-d}}, {{intel|TSX}}, {{intel|SpeedStep}} (EIST), Software Guard ({{intel|SGX}}), Memory Protection ({{intel|MPX}}), {{intel|OS Guard}}, {{intel|Secure Key}}, {{intel|Speed Shift}}, {{intel|Flex Memory Access}}, {{intel|Smart Response Technology}}, {{intel|My WiFi Technology}} | ||
− | * '''GPU:''' {{intel|HD Graphics 610 | + | * '''GPU:''' {{intel|HD Graphics 610}} @ 350 MHz with bursts of 1-1.05 GHz |
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{{comp table start}} | {{comp table start}} | ||
− | <table class="comptable sortable | + | <table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19"> |
<tr class="comptable-header"><th> </th><th colspan="12">List of Kaby Lake-based Celeron Mobile Processors</th></tr> | <tr class="comptable-header"><th> </th><th colspan="12">List of Kaby Lake-based Celeron Mobile Processors</th></tr> | ||
− | <tr class="comptable-header"><th> </th><th colspan=" | + | <tr class="comptable-header"><th> </th><th colspan="8">Main processor</th><th colspan="3">IGP</th></tr> |
− | {{comp table header 1|cols=Price, Launched, C, T, Freq, TDP, Max Mem, Name, Freq, Turbo Freq}} | + | {{comp table header 1|cols=Price, Process, Launched, C, T, Freq, TDP, Max Mem, Name, Freq, Turbo Freq}} |
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Celeron]] [[microarchitecture::Kaby Lake]] [[market segment::Mobile]] | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Celeron]] [[microarchitecture::Kaby Lake]] [[market segment::Mobile]] | ||
|?full page name | |?full page name | ||
|?model number | |?model number | ||
|?release price | |?release price | ||
+ | |?process | ||
|?first launched | |?first launched | ||
|?core count | |?core count | ||
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|?integrated gpu | |?integrated gpu | ||
|?integrated gpu base frequency#MHz | |?integrated gpu base frequency#MHz | ||
− | |?integrated gpu max frequency# | + | |?integrated gpu max frequency#GHz |
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=13 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Celeron]] [[microarchitecture::Kaby Lake]] [[market segment::Mobile]]}} | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Celeron]] [[microarchitecture::Kaby Lake]] [[market segment::Mobile]]}} | ||
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</table> | </table> | ||
{{comp table end}} | {{comp table end}} | ||
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</table> | </table> | ||
=== Goldmont µarch === | === Goldmont µarch === | ||
− | {{main|intel/microarchitectures/goldmont | + | {{main|intel/microarchitectures/goldmont|l1=Goldmont Microarchitecture}} |
− | + | ==== Apollo Lake Core ==== | |
+ | {{main|intel/apollo_lake|l1=Apollo Lake Core}} | ||
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Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips | ||
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− | + | <table class="wikitable sortable"> | |
− | <table class=" | + | <tr><th colspan="11" style="background:#D6D6FF;">Apollo Lake-based Celeron SoCs</th></tr> |
− | + | <tr><th colspan="8">CPU</th><th colspan="3">IGP</th></tr> | |
− | + | <tr><th>Model</th><th>Launched</th><th>Cores</th><th>SDP</th><th>TDP</th><th>Freq</th><th>Turbo Freq</th><th>Max Mem</th><th>Name</th><th>Freq</th><th>Max Freq</th></tr> | |
− | + | {{#ask: [[Category:microprocessor models by intel]] [[microprocessor family::Celeron]] [[core name::Apollo Lake]] | |
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− | |?turbo frequency (1 core) | + | |?turbo frequency (1 core) |
+ | |?max memory | ||
|?integrated gpu | |?integrated gpu | ||
|?integrated gpu base frequency | |?integrated gpu base frequency | ||
|?integrated gpu max frequency | |?integrated gpu max frequency | ||
|format=template | |format=template | ||
− | |template=proc table | + | |template=proc table 2 |
− | |userparam= | + | |userparam=12 |
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}} | }} | ||
− | {{ | + | {{table count|col=11|ask=[[Category:microprocessor models by intel]] [[microprocessor family::Celeron]] [[core name::Apollo Lake]]}} |
</table> | </table> | ||
− |
Facts about "Celeron - Intel"
designer | Intel + |
first announced | April 1998 + |
full page name | intel/celeron + |
instance of | microprocessor family + |
instruction set architecture | IA-32 + and x86-64 + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | P6 +, NetBurst +, Core +, Penryn +, Nehalem +, Westmere +, Sandy Bridge +, Ivy Bridge +, Haswell +, Broadwell +, Airmont +, Goldmont +, Skylake +, Coffee Lake + and Kaby Lake + |
name | Intel Celeron + |
package | FCBGA1170 + |
process | 350 nm (0.35 μm, 3.5e-4 mm) +, 180 nm (0.18 μm, 1.8e-4 mm) +, 65 nm (0.065 μm, 6.5e-5 mm) +, 45 nm (0.045 μm, 4.5e-5 mm) +, 32 nm (0.032 μm, 3.2e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | BGA1170 + |
technology | CMOS + |
word size | 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) + |