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Latest revision | Your text | ||
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* [[Dodeca-Core]] | * [[Dodeca-Core]] | ||
* IBM's [[22 nm process|22 nm SOI process]] | * IBM's [[22 nm process|22 nm SOI process]] | ||
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* 4,200,000,000 transistors | * 4,200,000,000 transistors | ||
* 649 mm² die size | * 649 mm² die size |
Facts about "POWER8 - Microarchitectures - IBM"
codename | POWER8 + |
core count | 4 +, 6 +, 8 +, 10 + and 12 + |
designer | IBM + |
first launched | August 2013 + |
full page name | ibm/microarchitectures/power8 + |
instance of | microarchitecture + |
manufacturer | IBM + |
microarchitecture type | CPU + |
name | POWER8 + |
phase-out | June 2014 + |
pipeline stages (max) | 23 + |
pipeline stages (min) | 15 + |
process | 22 nm (0.022 μm, 2.2e-5 mm) + |