From WikiChip
Editing hisilicon/kunpeng/hi1616
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Latest revision | Your text | ||
Line 1: | Line 1: | ||
− | {{hisilicon title| | + | {{hisilicon title|Hi1616}} |
{{chip | {{chip | ||
|name=Hi1616 | |name=Hi1616 | ||
Line 26: | Line 26: | ||
}} | }} | ||
[[File:hi1616 exhibit sign.jpg|thumb|right|Hi1616 display.]] | [[File:hi1616 exhibit sign.jpg|thumb|right|Hi1616 display.]] | ||
− | + | '''Hi1616''' is a [[dotriaconta-core]] {{arch|64}} [[ARM]] server microprocessor introduced by HiSilicon in mid-2017. Fabricated by [[TSMC]] on a [[16 nm process]], this chip incorporates 32 {{armh|Cortex-A72}} cores operating at 2.4 GHz with a TDP of 85 W. The Hi1616 supports up to 512 GiB of quad-channel DDR4-2400 memory. This chip supports up to 2-way SMP with two ports supporting 96 Gb/s each. | |
== Cache == | == Cache == |
Facts about "Kunpeng 916 (Hi1616) - HiSilicon"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Kunpeng 916 (Hi1616) - HiSilicon#pcie + |
base frequency | 2,400 MHz (2.4 GHz, 2,400,000 kHz) + |
core count | 32 + |
core name | Cortex-A72 + |
designer | HiSilicon + and ARM Holdings + |
family | Hi16xx + |
first announced | August 2017 + |
first launched | August 2017 + |
full page name | hisilicon/kunpeng/hi1616 + |
has ecc memory support | true + |
instance of | microprocessor + |
isa | ARMv8 + |
isa family | ARM + |
l1$ size | 2,560 KiB (2,621,440 B, 2.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 1,024 KiB (1,048,576 B, 1 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) + |
ldate | August 2017 + |
main image | + |
manufacturer | TSMC + |
market segment | Server + |
max cpu count | 2 + |
max memory | 524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) + |
max memory bandwidth | 71.53 GiB/s (73,246.72 MiB/s, 76.805 GB/s, 76,804.753 MB/s, 0.0699 TiB/s, 0.0768 TB/s) + |
max memory channels | 4 + |
max sata ports | 8 + |
max usb ports | 2 + |
microarchitecture | Cortex-A72 + |
model number | Hi1616 + |
name | Hi1616 + |
process | 16 nm (0.016 μm, 1.6e-5 mm) + |
smp max ways | 2 + |
supported memory type | DDR4-2400 + |
tdp | 85 W (85,000 mW, 0.114 hp, 0.085 kW) + |
technology | CMOS + |
thread count | 32 + |
used by | HiSilicon D05 + and Huawei TaiShan 2280 + |
word size | 64 bit (8 octets, 16 nibbles) + |