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| | predecessor = | | | predecessor = |
| | predecessor link = | | | predecessor link = |
− | | successor = OCTEON Plus | + | | successor = OCTEON II |
− | | successor link = cavium/octeon plus | + | | successor link = cavium/octeon ii |
| }} | | }} |
− | '''OCTEON''' was a family of {{arch|64}} [[multi-core]] [[MIPS]] microprocessors designed by [[Cavium]] and introduced in mid-[[2005]]. These processors are primarily marketed towards makers of network infrastructure (commercial, enterprise, and data center switches, routers, etc..). Cavium offers OCTEON processors with anywhere from [[single-cores|one]] to [[hexadeca-cores|sixteen]] cores. | + | '''OCTEON''' was a family of {{arch|64}} [[multi-core]] [[MIPS]] microprocessors designed by [[Cavium]] for networking devices. |
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| == Overview == | | == Overview == |
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| == Members == | | == Members == |
− | | + | {{empty section}} |
− | === CN3000 Series ===
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− | The CN3000 series is entry-level processors containing just one cnMIPS core. Depending on the option, these processors either have an array of security-related hardware accelerators (e.g. [[AES]], [[TRNG]]) or various communication accelerators (e.g. hardware packet I/O processing). Additionally, all models have 1-3 [[RGMII]] interfaces, [[Conventional PCI]] interface, and USB 2.0. The 3010 models also have an TDM/PCM interface for direct VoIP communication.
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− | <!-- NOTE:
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− | This table is generated automatically from the data in the actual articles.
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− | If a microprocessor is missing from the list, an appropriate article for it needs to be
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− | created and tagged accordingly.
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− | | |
− | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
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− | -->
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− | <table class="wikitable sortable tc4 tc10 tc11 tc12 tc13 tc14 tc15">
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− | <tr><th colspan="15" style="background:#D6D6FF;">CN3000-Series Microprocessors</th></tr>
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− | <tr><th colspan="7">CPU</th><th colspan="3">Memory</th><th colspan="5">[[Hardware Accelerators]]</th></tr>
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− | <tr><th>Model</th><th>Price</th><th>Launched</th><th>Cores</th><th>L2$</th><th>Power</th><th>Freq</th><th>Mem Type</th><th>Max Mem</th><th>ECC</th><th>Encryption</th><th>Compression</th><th>RegEx</th><th>TCP</th><th>QoS</th></tr>
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− | {{#ask: [[Category:microprocessor models by cavium]][[microprocessor family::OCTEON]][[microprocessor series::CN3000]] | |
− | |?full page name
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− | |?model number
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− | |?release price
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− | |?first launched
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− | |?core count
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− | |?l2$ size#KiB
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− | |?power dissipation
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− | |?base frequency
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− | |?supported memory type
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− | |?max memory
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− | |?has ecc memory support
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− | |?has hardware accelerators for cryptography
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− | |?has hardware accelerators for data compression
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− | |?has hardware accelerators for regular expression
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− | |?has hardware accelerators for tcp packet processing
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− | |?has hardware accelerators for network quality of service processing
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− | |format=template
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− | |template=proc table 3
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− | |userparam=16:11
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− | |mainlabel=-
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− | |sort=model number
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− | }} | |
− | {{table count|col=15|ask=[[Category:microprocessor models by cavium]][[microprocessor family::OCTEON]][[microprocessor series::CN3000]]}}
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− | </table>
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− | | |
− | === CN3100 Series ===
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− | The CN3100 series includes both 110 and 120 models. Apart from their core count, they have an identical feature set which includes (depending on the version of the model chosen) an array of hardware accelerators for packet I/O processing, [[encryption]], [[TCP]], [[QoS]], compression/decompression, and [[RegEx]]. Additionally, these models support a faster [[PCI-X]] bus operating up to 100 MHz, gigabit Ethernet ([[GMII]]), and up to DDR2-667 ECC memory.
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− | <!-- NOTE:
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− | This table is generated automatically from the data in the actual articles.
| |
− | If a microprocessor is missing from the list, an appropriate article for it needs to be
| |
− | created and tagged accordingly.
| |
− | | |
− | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
| |
− | -->
| |
− | <table class="wikitable sortable tc4 tc10 tc11 tc12 tc13 tc14 tc15">
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− | <tr><th colspan="15" style="background:#D6D6FF;">CN3100-Series Microprocessors</th></tr>
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− | <tr><th colspan="7">CPU</th><th colspan="3">Memory</th><th colspan="5">[[Hardware Accelerators]]</th></tr>
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− | <tr><th>Model</th><th>Price</th><th>Launched</th><th>Cores</th><th>L2$</th><th>Power</th><th>Freq</th><th>Mem Type</th><th>Max Mem</th><th>ECC</th><th>Encryption</th><th>Compression</th><th>RegEx</th><th>TCP</th><th>QoS</th></tr>
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− | {{#ask: [[Category:microprocessor models by cavium]][[microprocessor family::OCTEON]][[microprocessor series::CN3100]]
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− | |?full page name
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− | |?model number
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− | |?release price
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− | |?first launched
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− | |?core count
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− | |?l2$ size#KiB
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− | |?power dissipation
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− | |?base frequency
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− | |?supported memory type
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− | |?max memory
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− | |?has ecc memory support
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− | |?has hardware accelerators for cryptography
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− | |?has hardware accelerators for data compression
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− | |?has hardware accelerators for regular expression
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− | |?has hardware accelerators for tcp packet processing
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− | |?has hardware accelerators for network quality of service processing
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− | |format=template
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− | |template=proc table 3
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− | |userparam=16:11
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− | |mainlabel=-
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− | |sort=model number
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− | }}
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− | {{table count|col=15|ask=[[Category:microprocessor models by cavium]][[microprocessor family::OCTEON]][[microprocessor series::CN3100]]}}
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− | </table>
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− | | |
− | === CN3600 Series ===
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− | The CN3600 series are [[quad-core]] microprocessors. The CN3600 series is identical in terms of features the CN3800 series with just half the cache.
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− | <!-- NOTE:
| |
− | This table is generated automatically from the data in the actual articles.
| |
− | If a microprocessor is missing from the list, an appropriate article for it needs to be
| |
− | created and tagged accordingly.
| |
− | | |
− | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
| |
− | -->
| |
− | <table class="wikitable sortable tc4 tc10 tc11 tc12 tc13 tc14 tc15">
| |
− | <tr><th colspan="15" style="background:#D6D6FF;">CN3600-Series Microprocessors</th></tr>
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− | <tr><th colspan="7">CPU</th><th colspan="3">Memory</th><th colspan="5">[[Hardware Accelerators]]</th></tr>
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− | <tr><th>Model</th><th>Price</th><th>Launched</th><th>Cores</th><th>L2$</th><th>Power</th><th>Freq</th><th>Mem Type</th><th>Max Mem</th><th>ECC</th><th>Encryption</th><th>Compression</th><th>RegEx</th><th>TCP</th><th>QoS</th></tr>
| |
− | {{#ask: [[Category:microprocessor models by cavium]][[microprocessor family::OCTEON]][[microprocessor series::CN3600]]
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− | |?full page name
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− | |?model number
| |
− | |?release price
| |
− | |?first launched
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− | |?core count
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− | |?l2$ size#KiB
| |
− | |?power dissipation
| |
− | |?base frequency
| |
− | |?supported memory type
| |
− | |?max memory
| |
− | |?has ecc memory support
| |
− | |?has hardware accelerators for cryptography
| |
− | |?has hardware accelerators for data compression
| |
− | |?has hardware accelerators for regular expression
| |
− | |?has hardware accelerators for tcp packet processing
| |
− | |?has hardware accelerators for network quality of service processing
| |
− | |format=template
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− | |template=proc table 3
| |
− | |userparam=16:11
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− | |mainlabel=-
| |
− | |sort=model number
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− | }}
| |
− | {{table count|col=15|ask=[[Category:microprocessor models by cavium]][[microprocessor family::OCTEON]][[microprocessor series::CN3600]]}}
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− | </table>
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− | | |
− | === CN3800 Series ===
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− | The CN3800 series was Cavium's flagship series with processors with up [[16 cores]]. These processors offer up to 16 [[GiB]] of 128-bit DDR2-800 ECC memory. Additionally these chips integrate multiple standard external networking interfaces with 4 to 8 Gigabit Ethernet ports ([[RGMII]]) or dual SPI-4.2 interfaces along with a host/slave PCI-X 64-bit 133 MHz interface that can be used as both a data and control interface.
| |
− | <!-- NOTE:
| |
− | This table is generated automatically from the data in the actual articles.
| |
− | If a microprocessor is missing from the list, an appropriate article for it needs to be
| |
− | created and tagged accordingly.
| |
− | | |
− | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
| |
− | -->
| |
− | <table class="wikitable sortable tc4 tc10 tc11 tc12 tc13 tc14 tc15">
| |
− | <tr><th colspan="15" style="background:#D6D6FF;">CN3800-Series Microprocessors</th></tr>
| |
− | <tr><th colspan="7">CPU</th><th colspan="3">Memory</th><th colspan="5">[[Hardware Accelerators]]</th></tr>
| |
− | <tr><th>Model</th><th>Price</th><th>Launched</th><th>Cores</th><th>L2$</th><th>Power</th><th>Freq</th><th>Mem Type</th><th>Max Mem</th><th>ECC</th><th>Encryption</th><th>Compression</th><th>RegEx</th><th>TCP</th><th>QoS</th></tr>
| |
− | {{#ask: [[Category:microprocessor models by cavium]][[microprocessor family::OCTEON]][[microprocessor series::CN3800]]
| |
− | |?full page name
| |
− | |?model number
| |
− | |?release price
| |
− | |?first launched
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− | |?core count
| |
− | |?l2$ size#KiB
| |
− | |?power dissipation
| |
− | |?base frequency
| |
− | |?supported memory type
| |
− | |?max memory
| |
− | |?has ecc memory support
| |
− | |?has hardware accelerators for cryptography
| |
− | |?has hardware accelerators for data compression
| |
− | |?has hardware accelerators for regular expression
| |
− | |?has hardware accelerators for tcp packet processing
| |
− | |?has hardware accelerators for network quality of service processing
| |
− | |format=template
| |
− | |template=proc table 3
| |
− | |userparam=16:11
| |
− | |mainlabel=-
| |
− | |sort=model number
| |
− | }}
| |
− | {{table count|col=15|ask=[[Category:microprocessor models by cavium]][[microprocessor family::OCTEON]][[microprocessor series::CN3800]]}}
| |
− | </table>
| |
| | | |
| == Datasheet == | | == Datasheet == |
| * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]] | | * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]] |
| * [[:File:octeon cn31xx product brief.pdf|OCTEON CN31XX Single- and Dual-Core Product Brief]] | | * [[:File:octeon cn31xx product brief.pdf|OCTEON CN31XX Single- and Dual-Core Product Brief]] |
− | * [[:File:octeon cn38xx and cn36xx product brief.pdf|OCTEON CN38XX/CN36XX 4 to 16-Core Product Brief]] | + | * [[:File:octeon cn38xx and cn36xx product brief.pdf|OCTEON CN38XX /CN36XX 4 to 16-Core Product Brief]] |