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{{armh title|Neoverse N2|arch}}
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{{armh title|Zeus|arch}}
 
{{microarchitecture
 
{{microarchitecture
 
|atype=CPU
 
|atype=CPU
|name=Zeus
+
|name=Ares
 
|designer=ARM Holdings
 
|designer=ARM Holdings
 
|manufacturer=TSMC
 
|manufacturer=TSMC
|introduction=2020
+
|process 2=7 nm
|process=7 nm
 
 
|oooe=Yes
 
|oooe=Yes
 
|speculative=Yes
 
|speculative=Yes
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|successor link=arm_holdings/microarchitectures/poseidon
 
|successor link=arm_holdings/microarchitectures/poseidon
 
}}
 
}}
'''Neoverse N2''' (codename '''Perseus''') is the successor to {{\\|Ares}}, a high-performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the server market. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in their own chips.
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'''Zeus''' is the successor to {{\\|Ares}}, a high-performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the server market. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in their own chips.
  
== History ==
 
[[File:arm server roadmap techcon 2018.jpg|thumb|right|Arm's server roadmap.]]
 
Zeus was first announced by Drew Henry, Arm’s SVP and GM of Infrastructure Business Unit, at his TechCon 2018 keynote.
 
  
== Release Dates ==
 
Zeus is expected to show up in products around 2020.
 
 
== Process Technology ==
 
Zeus specifically designed takes advantage of the power and area advantages of the [[7 nm process|7nm+ process]].
 
 
== Architecture ==
 
 
{{future information}}
 
{{future information}}
 
=== Key changes from {{\\|Ares}} ===
 
* [[7nm+ process]] (from [[7nm]])
 
 
{{expand list}}
 
 
== Bibliography ==
 
* Drew Henry keynote, TechCon 2018 keynote.
 

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codenameZeus +
designerARM Holdings +
first launched2020 +
full page namearm holdings/microarchitectures/neoverse n2 +
instance ofmicroarchitecture +
manufacturerTSMC +
microarchitecture typeCPU +
nameZeus +
process7 nm (0.007 μm, 7.0e-6 mm) +