From WikiChip
Editing apm/x-gene

Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.

This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.

Latest revision Your text
Line 120: Line 120:
 
=== X-Gene 3 ===
 
=== X-Gene 3 ===
 
{{see also|apm/microarchitectures/skylark|l1=Skylark microarchitecture}}
 
{{see also|apm/microarchitectures/skylark|l1=Skylark microarchitecture}}
Third-generation of X-Gene processors were announced in 2016 and started sampling in 2017. X-Gene 3 processors are based on the {{apm|Skylark|l=arch}} microarchitecture and were fabricated on [[TSMC]]'s [[16 nm process]]. AppliedMicro made large changed to the system architecture of the chip and some minor changes to the core. The chip design shifted from incorporating an array of accelerators on-die to offering a large set of I/O (mostly PCIe lanes) so that high-performance [[PCIe]]-based [[accelerators]] could be attached instead. In 2017 AppliedMicro sold the X-Gene assets to [[Ampere Computing]] and consequently discontinued the X-Gene line. X-Gene 3 has re-launched by Ampere under the {{ampere|eMAG}} family.
+
Third-generation of X-Gene processors were announced in 2016 and started sampling in 2017. X-Gene 2 processors are based on the {{apm|Skylark|l=arch}} microarchitecture and were fabricated on [[TSMC]]'s [[16 nm process]]. AppliedMicro made large changed to the system architecture of the chip and some minor changes to the core. The chip design shifted from incorporating an array of accelerators on-die to offering a large set of I/O (mostly PCIe lanes) so that high-performance [[PCIe]]-based [[accelerators]] could be attached instead. In 2017 AppliedMicro sold the X-Gene assets to [[Ampere Computing]] and consequently discontinued the X-Gene line. X-Gene 3 has re-launched by Ampere under the {{ampere|eMAG}} family.
  
 
* '''Mem:''' 8x DDR4 channels, up to 2666 MT/s with ECC; 1 TiB/socket
 
* '''Mem:''' 8x DDR4 channels, up to 2666 MT/s with ECC; 1 TiB/socket

Please note that all contributions to WikiChip may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see WikiChip:Copyrights for details). Do not submit copyrighted work without permission!

Cancel | Editing help (opens in new window)
Facts about "X-Gene - AppliedMicro"
designerAppliedMicro +
first announcedOctober 28, 2011 +
first launched2012 +
full page nameapm/x-gene +
instance ofmicroprocessor family +
instruction set architectureARM +
main designerAppliedMicro +
manufacturerTSMC +
microarchitectureStorm +, Shadowcat + and Skylark +
nameX-Gene +
process40 nm (0.04 μm, 4.0e-5 mm) +, 28 nm (0.028 μm, 2.8e-5 mm) + and 16 nm (0.016 μm, 1.6e-5 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +