Editing annapurna labs/graviton/graviton3

{{annapurna title|AWS Graviton3}}
{{chip
|name=AWS Graviton3
|image=graviton3.png
|image 2=graviton3(2).png
|caption=Graviton3 Package Front
|designer=Annapurna Labs
|manufacturer=TSMC
|market=Server
|first announced=November 30, 2021
|first launched=November 30, 2021
|family=Graviton
|frequency=2,600 MHz
|isa=ARMv8.4-A
|isa family=ARM
|microarch=Neoverse V1
|process=5 nm
|transistors=55,000,000,000
|technology=CMOS
|mcp=Yes
|die count=7
|word size=64 bit
|core count=64
|thread count=64
|predecessor=Graviton2
|predecessor link=annapurna_labs/graviton/graviton2
|successor=Graviton4
|successor link=annapurna_labs/graviton/graviton4
|contemporary=Graviton3E
|contemporary link=annapurna_labs/graviton/graviton3e
}}
'''AWS Graviton3''' is a [[tetrahexaconta-core]] [[ARMv8]] microprocessor designed by [[Amazon]] ([[Annapurna Labs]]) for Amazon's own infrastructure. Graviton3 is a [[5 nm]] 7-chiplet design SoC based on the Arm [[CMN-650 mesh interconnect]] and [[Neoverse V1]] core microarchitecture. This chip supports octa-channel DDR5-4800 ECC memory along with 32 lanes of PCIe 5.0.


== Cache ==
{{main|arm_holdings/microarchitectures/neoverse v1#Memory_Hierarchy|l1=Neoverse V1 § Cache}}
{{cache size
|l1 cache=8 MiB
|l1i cache=4 MiB
|l1i break=64x64 KiB
|l1d cache=4 MiB
|l1d break=64x64 KiB
|l2 cache=64 MiB
|l2 break=64x1 MiB
|l3 cache=32 MiB
|l3 break=1x32 MiB
}}

== Memory controller ==
{{memory controller
|type=DDR5-4800
|ecc=Yes
|controllers=4
|channels=8
|max bandwidth=307.2 GB/s
|bandwidth schan=38.4 GB/s
|bandwidth dchan=76.8 GB/s
|bandwidth qchan=153.6 GB/s
|bandwidth ochan=307.2 GB/s
}}

== Expansions ==
{{expansions
| pcie revision      = 5.0
| pcie lanes         = 32
| pcie config        = x16
| pcie config 2      = x8
| pcie config 3      = x4
}}
@@ Line 32: / Line 32: @@
 '''AWS Graviton3''' is a [[tetrahexaconta-core]] [[ARMv8]] microprocessor designed by [[Amazon]] ([[Annapurna Labs]]) for Amazon's own infrastructure. Graviton3 is a [[5 nm]] 7-chiplet design SoC based on the Arm [[CMN-650 mesh interconnect]] and [[Neoverse V1]] core microarchitecture. This chip supports octa-channel DDR5-4800 ECC memory along with 32 lanes of PCIe 5.0.
-== Overview ==
-This 3rd-generation server processor was first announced during Amazon's AWS re:Invent [[2021]]. The general rollout for the Graviton3 chip in the AWS data center occurred in early 2022. These processors are offered as part of Amazon's EC2 instances.
-[[File:graviton3 layout.png|thumb|left]]
-[[File:graviton3 features.png|thumb|right]]
-[[File:AWS Graviton3 Processor.jpg|thumb|right]]
-{{clear|left}}
 == Cache ==
 {{main|arm_holdings/microarchitectures/neoverse v1#Memory_Hierarchy|l1=Neoverse V1 § Cache}}
@@ Line 75: / Line 68: @@
 | pcie config 3      = x4
 }}
-== Raw info ==
-=== lscpu ===
-<pre>
-# lscpu
-Architecture:          aarch64
-CPU op-mode(s):        32-bit, 64-bit
-Byte Order:            Little Endian
-CPU(s):                1
-On-line CPU(s) list:   0
-Vendor ID:             ARM
-Model:                 1
-Thread(s) per core:    1
-Core(s) per socket:    1
-Socket(s):             1
-Stepping:              r1p1
-BogoMIPS:              2100.00
-Flags:                 fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 sve asimdfhm dit uscat ilrcpc flagm ssbs paca pacg dcpodp sve i8mm svebf16 i8mm bf16 dgh rng
-L1d:                   64 KiB
-L1i:                   64 KiB
-L2:                    1 MiB
-L3:                    32 MiB
-NUMA node(s):          1
-NUMA node0 CPU(s):     0
-</pre>
-See [[arm/armv8#ARMv8_Extensions_and_Processor_Features|ARMv8 features]] for a description of flags.
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	AWS Graviton3 - Annapurna Labs (Amazon)#io +
base frequency	2,600 MHz (2.6 GHz, 2,600,000 kHz) +
core count	64 +
designer	Annapurna Labs +
die count	7 +
family	Graviton +
first announced	November 30, 2021 +
first launched	November 30, 2021 +
full page name	annapurna labs/graviton/graviton3 +
has ecc memory support	true +
instance of	microprocessor +
is multi-chip package	true +
isa	ARMv8.4-A +
isa family	ARM +
l1$ size	8,192 KiB (8,388,608 B, 8 MiB) +
l1d$ size	4,096 KiB (4,194,304 B, 4 MiB) +
l1i$ size	4,096 KiB (4,194,304 B, 4 MiB) +
l2$ size	64 MiB (65,536 KiB, 67,108,864 B, 0.0625 GiB) +
l3$ size	32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) +
ldate	November 30, 2021 +
main image	+
main image caption	Graviton3 Package Front +
manufacturer	TSMC +
market segment	Server +
max memory bandwidth	286.102 GiB/s (292,968.75 MiB/s, 307.2 GB/s, 307,200 MB/s, 0.279 TiB/s, 0.307 TB/s) +
max memory channels	8 +
max pcie lanes	32 +
microarchitecture	Neoverse V1 +
name	AWS Graviton3 +
process	5 nm (0.005 μm, 5.0e-6 mm) +
supported memory type	DDR5-4800 +
technology	CMOS +
thread count	64 +
transistor count	55,000,000,000 +
word size	64 bit (8 octets, 16 nibbles) +